[openib-general] [PATCH] mthca updates (2.6.8 dependent)

[Roland Dreier]

    Grant> FYI, PARISC *only* support transaction based interrupts.
    Grant> The CPU has no interrupt lines going to it.  On IA64, I
    Grant> believe the same is true (for PCI) because the "Local
    Grant> SAPIC" is integrated into the CPU (same silicon).

This must just be between the CPU and chipset... surely these
platforms support conventional PCI devices.  (Even current Intel x86
CPUs use interrupt messages rather than interrupt wires to get
interrupts from their host bridges)

 - R.