[openib-general] Re: [PATCH] mthca: correct max_rd_atomic handling

Michael S. Tsirkin mst at mellanox.co.il
Thu Dec 15 15:44:10 PST 2005


Quoting r. Roland Dreier <rdreier at cisco.com>:
> Subject: Re: [PATCH] mthca: correct max_rd_atomic handling
> 
>     Michael> Right. Thats why we set it inconditionally when
>     Michael> IB_QP_MAX_QP_RD_ATOMIC attribute bit is set, and
>     Michael> IB_QP_MAX_QP_RD_ATOMIC is required to go to RTS.
> 
> Not for UC transport... I think this patch would break RDMA on UC QPs, right?

Ugh. Looks right. It did seem to work ... go figure.
So, lets set MTHCA_QP_BIT_SWE together with MTHCA_FLIGHT_LIMIT as we did
previously.  The other bits are correct, though, arent they?
Like this (untested: I'm out of the lab for the weekend).

Signed-off-by: Jack Morgenstein <jackm at mellanox.co.il>
Signed-off-by: Michael S. Tsirkin <mst at mellanox.co.il>

Index: openib/drivers/infiniband/hw/mthca/mthca_qp.c
===================================================================
--- openib/drivers/infiniband/hw/mthca/mthca_qp.c	(revision 4489)
+++ openib/drivers/infiniband/hw/mthca/mthca_qp.c	(working copy)
@@ -715,9 +715,7 @@ int mthca_modify_qp(struct ib_qp *ibqp, 
 	qp_context->wqe_lkey   = cpu_to_be32(qp->mr.ibmr.lkey);
 	qp_context->params1    = cpu_to_be32((MTHCA_ACK_REQ_FREQ << 28) |
 					     (MTHCA_FLIGHT_LIMIT << 24) |
-					     MTHCA_QP_BIT_SRE           |
-					     MTHCA_QP_BIT_SWE           |
-					     MTHCA_QP_BIT_SAE);
+					     MTHCA_QP_BIT_SWE);
 	if (qp->sq_policy == IB_SIGNAL_ALL_WR)
 		qp_context->params1 |= cpu_to_be32(MTHCA_QP_BIT_SSC);
 	if (attr_mask & IB_QP_RETRY_CNT) {
@@ -726,9 +724,13 @@ int mthca_modify_qp(struct ib_qp *ibqp, 
 	}
 
 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
-		if (attr->max_rd_atomic)
+		if (attr->max_rd_atomic) {
+			qp_context->params1 |=
+				cpu_to_be32(MTHCA_QP_BIT_SRE |
+					    MTHCA_QP_BIT_SAE);
 			qp_context->params1 |=
 				cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21);
+		}
 		qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_SRA_MAX);
 	}
 



-- 
MST



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