[openib-general] has anyone tried MSI-X on Opteron?

[Roland Dreier]

    Eric> A HT interrupt message is a write cycle to a an address in
    Eric> the range 0xFDF8000000 - 0xFDF8FFFFFF.  So a PCI write cycle
    Eric> getting turned into a HT write cycle is useful behavior.
    Eric> The question is can we generate an appropriate write to
    Eric> those addresses from the card, and will the 8131 filter a
    Eric> write to those addresses.

I'd be surprised if a bridge would turn a PCI cycle into an HT write
with IntrInfo present instead of byte enables though.  (Unless the
bridge knew about MSI)

 - Roland