[openib-general] [PATCH] roland-uverbs: possible race condition

[Roland Dreier]

    Michael> True while on the Express, but I think for the chipset it
    Michael> is legal to order interrupt messages differently from
    Michael> writes.

I seem to remember someone quoting the PCI spec saying that this was
not allowed, but I can't find it right now.  Grant, do you happen to
know if legacy INTx interrupts are allowed to pass writes to memory
once they leave PCI Express and make it into the chipset?

 - R.