[openib-general] Help with CONFIG_PCI_MSI in the kernel

[Greg KH]

On Tue, Apr 04, 2006 at 12:07:23PM -0600, Jason Gunthorpe wrote:
> +#ifdef CONFIG_PCI_MSI

No #ifdef is needed really, right?

> +static void __devinit fixup_ht_msi(struct pci_dev* dev)
> +{
> +	/* Some BIOS's do not enable the hypertransport MSI mapping capability
> +	   on the chipset. This breaks MSI support.. */
> +	int pos = pci_find_capability(dev,PCI_CAP_ID_HT);
> +	while (pos != 0)
> +	{

Wrong coding style :)

> +		u32 cap;
> +		pci_read_config_dword(dev,pos,&cap);
> +		if (((cap >> 16) & PCI_HT_CMD_TYP) == PCI_HT_CMD_TYP_MSIM) {
> +			if ((cap & PCI_HT_MSIM_ENABLE) == 0) {
> +				printk("BIOS BUG: HyperTransport MSI mapping not enabled for %s, enabling.\n",pci_name(dev));
> +				cap |= PCI_HT_MSIM_ENABLE;
> +				pci_write_config_dword(dev,pos,cap);
> +			}
> +			break;
> +		}
> +		pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_HT);
> +	}
> +}
> +DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, fixup_ht_msi);
> +#endif

What's the odds that we don't want to do this for every pci device?  Do
any of them lie about their capabilities?

>  
>  static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end)
>  {
> --- linux-2.6.15.4/include/linux/pci_regs.h	2006-02-16 12:09:05.000000000 -0700
> +++ lin/include/linux/pci_regs.h	2006-02-16 12:12:30.000000000 -0700
> @@ -196,12 +196,14 @@
>  #define  PCI_CAP_ID_MSI		0x05	/* Message Signalled Interrupts */
>  #define  PCI_CAP_ID_CHSWP	0x06	/* CompactPCI HotSwap */
>  #define  PCI_CAP_ID_PCIX	0x07	/* PCI-X */
> +#define  PCI_CAP_ID_HT          0x08    /* HyperTransport */

No tabs used :(

>  #define  PCI_CAP_ID_SHPC 	0x0C	/* PCI Standard Hot-Plug Controller */
>  #define  PCI_CAP_ID_EXP 	0x10	/* PCI Express */
>  #define  PCI_CAP_ID_MSIX	0x11	/* MSI-X */
>  #define PCI_CAP_LIST_NEXT	1	/* Next capability in the list */
>  #define PCI_CAP_FLAGS		2	/* Capability defined flags (16 bits) */
>  #define PCI_CAP_SIZEOF		4
> +#define PCI_HT_CMD_TYP          0xf800  /* Hypertransport capability type mask */
>  
>  /* Power Management Registers */
>  
> @@ -285,6 +287,10 @@
>  #define PCI_MSI_DATA_64		12	/* 16 bits of data for 64-bit devices */
>  #define PCI_MSI_MASK_BIT	16	/* Mask bits register */
>  
> +/* HyperTransport MSI Mapping registers */
> +#define PCI_HT_CMD_TYP_MSIM 0xa800      // MSI Mapping type
> +#define PCI_HT_MSIM_ENABLE  (1<<16)

No tabs used :(

And don't use //

thanks,

greg k-h