[openib-general] sl2vl tables

Hal Rosenstock halr at voltaire.com
Thu Feb 15 14:39:36 PST 2007


On Thu, 2007-02-15 at 17:08, Dale Purdy wrote:
> We are experimenting with OFED 1.2 (alpha1) and have dumped the SL2VL
> tables for both a switch port and an HCA port using the smpqueury
> command:
> 
> switch:
> # SL2VL table: Lid 103
> #                 SL: | 0| 1| 2| 3| 4| 5| 6| 7| 8| 9|10|11|12|13|14|15|
> ports: in  0, out  1: | 0| 1| 2| 3| 0| 1| 2| 3| 0| 1| 2| 3| 0| 1| 2| 3|
> ports: in  1, out  1: | 0| 1| 2| 3| 0| 1| 2| 3| 0| 1| 2| 3| 0| 1| 2| 3|
> ...
> 
> HCA:
> # SL2VL table: Lid 37
> #                 SL: | 0| 1| 2| 3| 4| 5| 6| 7| 8| 9|10|11|12|13|14|15|
> ports: in  0, out  0: | 3| 2| 1| 0| 3| 2| 1| 0| 3| 2| 1| 0| 3| 2| 1| 0|
> 
> I would have expected the behavior that the switch describes - a one
> to one mapping mod the supported number of VLs.  But I can't explain
> why the HCA VLs are in reverse order to the SL.  If this were a host
> endian issue I would have expected both to behave the same.  Can
> someone explain what is going on?

Is this on powerup of HCA node or after some SM potentially programs the
HCA (for this) ?

I typically see (for HCAs):
# SL2VL table: Lid 10
#                 SL: | 0| 1| 2| 3| 4| 5| 6| 7| 8| 9|10|11|12|13|14|15|
ports: in  0, out  0: | 0| 1| 2| 3| 4| 5| 6| 7| 0| 1| 2| 3| 4| 5| 6| 7|

-- Hal

> Dale
> 
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