[ofa-general] Re: libmlx4 wc flash

[Roland Dreier]

OK, how about this for libibverbs:

diff --git a/include/infiniband/arch.h b/include/infiniband/arch.h
index 6a04287..df4c949 100644
--- a/include/infiniband/arch.h
+++ b/include/infiniband/arch.h
@@ -56,13 +56,17 @@ static inline uint64_t ntohll(uint64_t x) { return x; }
  *     macro by either the compiler or the CPU.
  * wmb() - write memory barrier.  No stores may be reordered across
  *     this macro by either the compiler or the CPU.
+ * wc_wmb() - flush write combine buffers.  No write-combined writes
+ *     will be reordered across this macro by either the compiler or
+ *     the CPU.
  */
 
 #if defined(__i386__)
 
-#define mb()	asm volatile("lock; addl $0,0(%%esp) " ::: "memory")
-#define rmb()	mb()
-#define wmb()	asm volatile("" ::: "memory")
+#define mb()	 asm volatile("lock; addl $0,0(%%esp) " ::: "memory")
+#define rmb()	 mb()
+#define wmb()	 asm volatile("" ::: "memory")
+#define wc_wmb() mb()
 
 #elif defined(__x86_64__)
 
@@ -70,47 +74,54 @@ static inline uint64_t ntohll(uint64_t x) { return x; }
  * Only use lfence for mb() and rmb() because we don't care about
  * ordering against non-temporal stores (for now at least).
  */
-#define mb()	asm volatile("lfence" ::: "memory")
-#define rmb()	mb()
-#define wmb()	asm volatile("" ::: "memory")
+#define mb()	 asm volatile("lfence" ::: "memory")
+#define rmb()	 mb()
+#define wmb()	 asm volatile("" ::: "memory")
+#define wc_wmb() asm volatile("sfence" ::: "memory")
 
 #elif defined(__PPC64__)
 
-#define mb()	asm volatile("sync" ::: "memory")
-#define rmb()	asm volatile("lwsync" ::: "memory")
-#define wmb()	mb()
+#define mb()	 asm volatile("sync" ::: "memory")
+#define rmb()	 asm volatile("lwsync" ::: "memory")
+#define wmb()	 mb()
+#define wc_wmb() wmb()
 
 #elif defined(__ia64__)
 
-#define mb()	asm volatile("mf" ::: "memory")
-#define rmb()	mb()
-#define wmb()	mb()
+#define mb()	 asm volatile("mf" ::: "memory")
+#define rmb()	 mb()
+#define wmb()	 mb()
+#define wc_wmb() asm volatile("fwb" ::: "memory")
 
 #elif defined(__PPC__)
 
-#define mb()	asm volatile("sync" ::: "memory")
-#define rmb()	mb()
-#define wmb()	asm volatile("eieio" ::: "memory")
+#define mb()	 asm volatile("sync" ::: "memory")
+#define rmb()	 mb()
+#define wmb()	 asm volatile("eieio" ::: "memory")
+#define wc_wmb() wmb()
 
 #elif defined(__sparc_v9__)
 
-#define mb()	asm volatile("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" ::: "memory")
-#define rmb()	asm volatile("membar #LoadLoad" ::: "memory")
-#define wmb()	asm volatile("membar #StoreStore" ::: "memory")
+#define mb()	 asm volatile("membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" ::: "memory")
+#define rmb()	 asm volatile("membar #LoadLoad" ::: "memory")
+#define wmb()	 asm volatile("membar #StoreStore" ::: "memory")
+#define wc_wmb() wmb()
 
 #elif defined(__sparc__)
 
-#define mb()	asm volatile("" ::: "memory")
-#define rmb()	mb()
-#define wmb()	mb()
+#define mb()	 asm volatile("" ::: "memory")
+#define rmb()	 mb()
+#define wmb()	 mb()
+#define wc_wmb() wmb()
 
 #else
 
 #warning No architecture specific defines found.  Using generic implementation.
 
-#define mb()	asm volatile("" ::: "memory")
-#define rmb()	mb()
-#define wmb()	mb()
+#define mb()	 asm volatile("" ::: "memory")
+#define rmb()	 mb()
+#define wmb()	 mb()
+#define wc_wmb() wmb()
 
 #endif