[ofa-general] [PATCH] ib_core: Use weak ordering for data registered memory

[Roland Dreier]

 > Some architectures support weak ordering in which case better
 > performance is possible. IB registered memory used for data can be
 > weakly ordered becuase the the completion queues' buffers are
 > registered as strongly ordered. This will result in flushing all data
 > related outstanding DMA requests by the HCA when a completion is DMAed
 > to a completion queue buffer.
 > This patch will allow weak ordering for data if ib_core is loaded with
 > the module parameter, allow_weak_ordering, set to a none zero value.

Hmm, I guess this is OK, although I wish there were a good way for users
and applications to know whether the ordering of RDMA can be relied on
or not.

 > Also, are you going to push this to 2.6.28?

No, since this appeared late in the 2.6.28 merge window, it's way too
late for 2.6.28 -- things need to be submitted before the merge window
to have a chance of going in.

We'll get some fix for Cell performance into 2.6.29.

 - R.