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<p class="MsoNormal">Shachar Raindel from Mellanox and Davide Rossetti from NVidia have shown how RDMA and GPU devices can synchronize compute and IO operations.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">This technology is complementary to GPUDirect, which allows direct RDMA transfers to GPU memory, and is now under review in upstream Linux.<o:p></o:p></p>
<p class="MsoNormal">The technology offers 2 mechanisms:<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l0 level1 lfo2"><![if !supportLists]><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>A way for the GPU to poll for completion<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-18.0pt;mso-list:l0 level1 lfo2"><![if !supportLists]><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span><![endif]><span dir="LTR"></span>A way for the GPU to signal the execution of a pre-posted work requests<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">These 2 mechanisms can be used in a variety of use cases such as waiting for incoming data before executing a GPU kernel. Another example is to send out the results of a kernel computation, and continue computation after the results have
been successfully been transmitted and acknowledged.<o:p></o:p></p>
<p class="MsoNormal">Initial benchmarking shows considerable reduced latency (up to 40% in simple transactional benchmarks), increased application scaling, and much lower CPU utilization on the host.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">The underlying implementation comprises Verbs extensions to post un-signaled work requests, and the ability to query from the provider memory locations for reading (polling) or writing (triggering operations).<o:p></o:p></p>
<p class="MsoNormal">The CUDA library is extended to issue such memory operations.<o:p></o:p></p>
<p class="MsoNormal">Finally, another library, GDS, provides simple abstractions that implement the above operations on both the Verbs and CUDA interfaces.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Current plans are to submit the Verbs extensions for upstream review in a few weeks.<o:p></o:p></p>
<p class="MsoNormal">The GDS library is expected to be released in about 2 months.<o:p></o:p></p>
<p class="MsoNormal">The library will be open source, with either BSD or MIT license.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">While the proof of concept was developed for HCA-GPU synchronization, the APIs are generic and apply to other IO devices as well.<o:p></o:p></p>
<p class="MsoNormal">There are no dependencies between the Verbs stack and GPU libraries.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">--Liran<o:p></o:p></p>
<p class="MsoNormal">P.S. there will be no OFVWG meeting next week.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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