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<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>The following patch
adds supports for features needed for ipoib such as collapsed CQs and RSS (first
step is to allocate ranges of qps).</FONT></SPAN></DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>Thanks</FONT></SPAN></DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>Tzachi</FONT></SPAN></DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2></FONT></SPAN> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>Index:
mlx4/kernel/bus/ib/cq.c</FONT></SPAN></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/ib/cq.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/ib/cq.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -200,7 +200,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> <BR> err = mlx4_cq_alloc(dev->dev,
entries, &cq->buf.mtt, uar,<BR>- cq->db.dma.da,
&cq->mcq);<BR>+ cq->db.dma.da, &cq->mcq, 0,
0);<BR> if (err)<BR> goto
err_dbmap;<BR> <BR>Index: mlx4/kernel/bus/ib/main.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/ib/main.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/ib/main.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -91,7 +91,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> <BR> props->max_mr_size =
~0ull;<BR> props->page_size_cap =
dev->dev->caps.page_size_cap;<BR>- props->max_qp
= dev->dev->caps.num_qps -
dev->dev->caps.reserved_qps;<BR>+//?????????????????????? props->max_qp
= dev->dev->caps.num_qps -
dev->dev->caps.reserved_qps;<BR> props->max_qp_wr
= dev->dev->caps.max_wqes -
MLX4_IB_SQ_MAX_SPARE;<BR> <BR> props->max_sge
= min(dev->dev->caps.max_sq_sg,<BR>@@ -252,34 +252,6
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> <BR> return 0;<BR> }<BR>-<BR>-static int
mlx4_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int
reset_qkey_viols,<BR>- u32 cap_mask)<BR>-{<BR>- struct
mlx4_cmd_mailbox *mailbox;<BR>- int err;<BR>-<BR>- mailbox =
mlx4_alloc_cmd_mailbox(dev->dev);<BR>- if
(IS_ERR(mailbox))<BR>- return
PTR_ERR(mailbox);<BR>-<BR>- memset(mailbox->buf, 0,
256);<BR>-<BR>- if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS)
{<BR>- *(u8 *) mailbox->buf =
(u8)(!!reset_qkey_viols << 6);<BR>- ((__be32 *)
mailbox->buf)[2] = cpu_to_be32(cap_mask);<BR>- } else
{<BR>- ((u8 *) mailbox->buf)[3] =
(u8)!!reset_qkey_viols;<BR>- ((__be32 *) mailbox->buf)[1] =
cpu_to_be32(cap_mask);<BR>- }<BR>-<BR>- err = mlx4_cmd(dev->dev,
mailbox->dma.da, port, 0,
MLX4_CMD_SET_PORT,<BR>-
MLX4_CMD_TIME_CLASS_B);<BR>-<BR>- mlx4_free_cmd_mailbox(dev->dev,
mailbox);<BR>- return err;<BR>-}<BR>-<BR> static int
mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int
mask,<BR> struct
ib_port_modify *props)<BR> {<BR>@@ -296,7 +268,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> cap_mask
= (attr.port_cap_flags | props->set_port_cap_mask)
&<BR> ~props->clr_port_cap_mask;<BR> <BR>- err
= mlx4_SET_PORT(to_mdev(ibdev), port,<BR>+ err =
mlx4_SET_PORT(to_mdev(ibdev)->dev,
port,<BR> !!(mask &
IB_PORT_RESET_QKEY_CNTR),<BR>
cap_mask);<BR> <BR>Index: mlx4/kernel/bus/ib/qp.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/ib/qp.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/ib/qp.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -324,7 +324,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> <BR> static int create_qp_common(struct mlx4_ib_dev *dev,
struct ib_pd *pd,<BR> struct
ib_qp_init_attr *init_attr,<BR>- struct
ib_udata *udata, int sqpn, struct mlx4_ib_qp
*qp)<BR>+ struct ib_udata *udata, u32 sqpn,
struct mlx4_ib_qp *qp)<BR> {<BR> int err;<BR> <BR>@@ -419,6
+419,11 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> }<BR> <BR>+ if
(!sqpn)<BR>+ err = mlx4_qp_reserve_range(dev->dev, 1, 1,
&sqpn);<BR>+ if (err)<BR>+ goto
err_wrid;<BR>+<BR> err = mlx4_qp_alloc(dev->dev, sqpn,
&qp->mqp);<BR> if (err)<BR> goto
err_wrid;<BR>Index: mlx4/kernel/bus/ib/srq.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/ib/srq.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/ib/srq.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -82,6 +82,8
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> int
buf_size;<BR> int err;<BR> int i;<BR>+ u32 cqn =
0;<BR>+ u16 xrcd = 0;<BR> <BR> /* Sanity check SRQ size
before proceeding */<BR> if ((int)init_attr->attr.max_wr
>= dev->dev->caps.max_srq_wqes ||<BR>@@ -170,8 +172,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> goto
err_mtt;<BR> }<BR> }<BR>-<BR>- err =
mlx4_srq_alloc(dev->dev, to_mpd(pd)->pdn, &srq->mtt,<BR>+ err
= mlx4_srq_alloc(dev->dev, to_mpd(pd)->pdn, cqn, xrcd,
&srq->mtt,<BR>
srq->db.dma.da, &srq->msrq);<BR> if
(err)<BR> goto err_wrid;<BR>@@ -264,6 +265,9
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> struct
mlx4_ib_dev *dev = to_mdev(srq->device);<BR> struct mlx4_ib_srq
*msrq = to_msrq(srq);<BR> <BR>+ mlx4_srq_invalidate(dev->dev,
&msrq->msrq);<BR>+ mlx4_srq_remove(dev->dev,
&msrq->msrq);<BR>+<BR> mlx4_srq_free(dev->dev,
&msrq->msrq);<BR> mlx4_mtt_cleanup(dev->dev,
&msrq->mtt);<BR> <BR>Index:
mlx4/kernel/bus/inc/cmd.h</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/inc/cmd.h (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/inc/cmd.h (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -130,6 +130,15
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> MLX4_MAILBOX_SIZE =
4096<BR> };<BR> <BR>+enum {<BR>+ /* set port opcode modifiers
*/<BR>+ MLX4_SET_PORT_GENERAL =
0x0,<BR>+ MLX4_SET_PORT_RQP_CALC =
0x1,<BR>+ MLX4_SET_PORT_MAC_TABLE = 0x2,<BR>+ MLX4_SET_PORT_VLAN_TABLE
= 0x3,<BR>+ MLX4_SET_PORT_PRIO_MAP = 0x4,<BR>+};<BR>+<BR> struct
mlx4_dev;<BR> <BR> struct mlx4_cmd_mailbox {<BR>@@ -174,4 +183,6
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> struct
mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev);<BR> void
mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox
*mailbox);<BR> <BR>+int imlx4_cmd(struct mlx4_dev *dev, u64 in_param, u64
*out_param, int out_is_imm,<BR>+ u32 in_modifier, u8 op_modifier, u16
op, unsigned long timeout);<BR> #endif /* MLX4_CMD_H */<BR>Index:
mlx4/kernel/bus/inc/device.h</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/inc/device.h (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/inc/device.h (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -55,6 +55,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 <<
7,<BR> MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 <<
8,<BR> MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 <<
9,<BR>+ MLX4_DEV_CAP_FLAG_DPDP = 1 <<
12,<BR> MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 <<
16,<BR> MLX4_DEV_CAP_FLAG_APM = 1 <<
17,<BR> MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18,<BR>@@ -128,11
+129,26 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> MLX4_STAT_RATE_OFFSET = 5<BR> };<BR> <BR>+enum
qp_region {<BR>+ MLX4_QP_REGION_FW =
0,<BR>+ MLX4_QP_REGION_ETH_ADDR,<BR>+ MLX4_QP_REGION_FC_ADDR,<BR>+ MLX4_QP_REGION_FC_EXCH,<BR>+ MLX4_QP_REGION_COUNT /*
Must be last */<BR>+};<BR>+<BR>+enum {<BR>+ MLX4_NUM_FEXCH = 64
* 1024,<BR>+};<BR>+<BR>+<BR> struct mlx4_caps
{<BR> u64 fw_ver;<BR> int num_ports;<BR> int vl_cap[MLX4_MAX_PORTS
+ 1];<BR>- int mtu_cap[MLX4_MAX_PORTS +
1];<BR>+ int ib_mtu_cap[MLX4_MAX_PORTS +
1];<BR>+ u64 def_mac[MLX4_MAX_PORTS +
1];<BR>+ int eth_mtu_cap[MLX4_MAX_PORTS +
1];<BR> int gid_table_len[MLX4_MAX_PORTS +
1];<BR> int pkey_table_len[MLX4_MAX_PORTS +
1];<BR> int local_ca_ack_delay;<BR>@@ -147,7 +163,6
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> int max_rq_desc_sz;<BR> int max_qp_init_rdma;<BR> int max_qp_dest_rdma;<BR>- int reserved_qps;<BR> int sqp_start;<BR> int num_srqs;<BR> int max_srq_wqes;<BR>@@
-176,13 +191,46 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> u32 flags;<BR> u16 stat_rate_support;<BR> u8 port_width_cap[MLX4_MAX_PORTS
+
1];<BR>+ int reserved_qps_cnt[MLX4_QP_REGION_COUNT];<BR>+ int reserved_qps_base[MLX4_QP_REGION_COUNT];<BR>+ int log_num_macs;<BR>+ int log_num_vlans;<BR>+ int log_num_prios;<BR>+ enum
mlx4_port_type port_type[MLX4_MAX_PORTS +
1];<BR>+ int reserved_fexch_mpts_base;
<BR> };<BR> <BR> struct mlx4_buf_list
{<BR> u8
*buf;<BR> dma_addr_t map;<BR> };<BR>+enum
{<BR>+ MLX4_DB_PER_PAGE = PAGE_SIZE / 4<BR>+};<BR> <BR>+struct
mlx4_db_pgdir {<BR>+ struct
list_head
list;<BR>+ DECLARE_BITMAP(order0,
MLX4_DB_PER_PAGE);<BR>+ DECLARE_BITMAP(order1, MLX4_DB_PER_PAGE /
2);<BR>+ unsigned
long
*bits[2];<BR>+ __be32
*db_page;<BR>+ dma_addr_t
db_dma;<BR>+};<BR>+<BR>+struct mlx4_db
{<BR>+ __be32
*db;<BR>+ struct mlx4_db_pgdir
*pgdir;<BR>+ dma_addr_t
dma;<BR>+ int
index;<BR>+ int
order;<BR>+};<BR>+<BR>+struct mlx4_mtt
{<BR>+ u32 first_seg;<BR>+ int order;<BR>+ int page_shift;<BR>+};<BR>+<BR> struct
mlx4_buf {<BR> union {<BR> struct
mlx4_buf_list direct;<BR>@@ -193,10 +241,10 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> int page_shift;<BR> };<BR> <BR>-struct
mlx4_mtt
{<BR>- u32 first_seg;<BR>- int order;<BR>- int page_shift;<BR>+struct
mlx4_hwq_resources {<BR>+ struct mlx4_db db;<BR>+ struct
mlx4_mtt mtt;<BR>+ struct mlx4_buf
buf;<BR> };<BR> <BR> struct mlx4_mr {<BR>@@ -238,6 +286,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> int arm_sn;<BR> <BR> int cqn;<BR>+ int comp_eq_idx;
<BR> <BR> atomic_t refcount;<BR> struct
completion free;<BR>@@ -304,10 +353,45 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> u64 si_guid;<BR> };<BR> <BR>+static
inline void mlx4_query_steer_cap(struct mlx4_dev *dev, int
*log_mac,<BR>+ int *log_vlan, int
*log_prio)<BR>+{<BR>+ *log_mac =
dev->caps.log_num_macs;<BR>+ *log_vlan =
dev->caps.log_num_vlans;<BR>+ *log_prio =
dev->caps.log_num_prios;<BR>+}<BR>+<BR>+static inline u32
mlx4_get_ports_of_type(struct mlx4_dev
*dev,<BR>+ enum mlx4_port_type
ptype)<BR>+{<BR>+ u32 ret = 0;<BR>+ int i;<BR>+<BR>+ for (i = 1;
i <= dev->caps.num_ports; ++i) {<BR>+ if
(dev->caps.port_type[i] == ptype)<BR>+ ret |= 1 <<
(i-1);<BR>+ }<BR>+ return ret;<BR>+}<BR>+<BR>+#define
foreach_port(port, bitmap) \<BR>+ for ((port) = 1; (port) <=
MLX4_MAX_PORTS; ++(port)) \<BR>+ if (bitmap & 1 <<
((port)-1))<BR>+<BR>+static inline int mlx4_get_fexch_mpts_base(struct mlx4_dev
*dev)<BR>+{<BR>+ return
dev->caps.reserved_fexch_mpts_base;<BR>+}<BR>+<BR> int
mlx4_buf_alloc(struct mlx4_dev *dev, int size, int
max_direct,<BR> struct mlx4_buf
*buf);<BR> void mlx4_buf_free(struct mlx4_dev *dev, int size, struct
mlx4_buf *buf);<BR> <BR>+int mlx4_db_alloc(struct mlx4_dev *dev,
<BR>+ struct mlx4_db *db, int order);<BR>+<BR>+void
mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db *db);<BR>+<BR> int
mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn);<BR> void mlx4_pd_free(struct
mlx4_dev *dev, u32 pdn);<BR> <BR>@@ -319,25 +403,68 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> void
mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt);<BR> u64
mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt);<BR> <BR>+int
mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32
pd,<BR>+ u64 iova, u64 size, u32 access, int
npages,<BR>+ int page_shift, struct mlx4_mr
*mr);<BR> int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64
size, u32 access,<BR> int npages, int page_shift, struct
mlx4_mr *mr);<BR> void mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr
*mr);<BR>+void mlx4_mr_free_reserved(struct mlx4_dev *dev, struct mlx4_mr
*mr);<BR> int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr
*mr);<BR> int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt
*mtt,<BR> int start_index, int npages, u64
*page_list);<BR> int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct
mlx4_mtt *mtt,<BR> struct
mlx4_buf *buf);<BR> <BR>+struct device;<BR>+<BR>+int
mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources
*wqres,<BR>+ int size, int
max_direct);<BR>+void mlx4_free_hwq_res(struct mlx4_dev *mdev, struct
mlx4_hwq_resources *wqres,<BR>+ int
size);<BR>+<BR> int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct
mlx4_mtt *mtt,<BR>- struct mlx4_uar *uar, u64 db_rec, struct
mlx4_cq *cq);<BR>+ struct mlx4_uar *uar, u64 db_rec, struct
mlx4_cq *cq,<BR>+ unsigned vector, int
collapsed);<BR> void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq
*cq);<BR> <BR>-int mlx4_qp_alloc(struct mlx4_dev *dev, int sqpn, struct
mlx4_qp *qp);<BR>+struct mlx4_cq_context;<BR>+int mlx4_cq_modify(struct mlx4_dev
*dev, struct mlx4_cq *cq,<BR>+ struct mlx4_cq_context
*context, int modify);<BR>+<BR>+static inline void mlx4_cq_arm(struct mlx4_cq
*cq, u32 cmd,<BR>+ void
__iomem *uar_page,<BR>+
spinlock_t *doorbell_lock);<BR>+<BR>+enum mlx4_qp_state;<BR>+enum
mlx4_qp_optpar;<BR>+struct mlx4_qp_context;<BR>+<BR>+int
mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32
*base);<BR>+void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int
cnt);<BR>+int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp
*qp);<BR> void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp
*qp);<BR> <BR>-int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct
mlx4_mtt *mtt,<BR>- u64 db_rec, struct mlx4_srq
*srq);<BR>+int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt
*mtt,<BR>+ enum mlx4_qp_state cur_state, enum
mlx4_qp_state new_state,<BR>+ struct mlx4_qp_context
*context, enum mlx4_qp_optpar optpar,<BR>+ int
sqd_event, struct mlx4_qp *qp);<BR>+<BR>+<BR>+int mlx4_qp_to_ready(struct
mlx4_dev *dev, struct mlx4_mtt *mtt,<BR>+
struct mlx4_qp_context *context,<BR>+ struct
mlx4_qp *qp, enum mlx4_qp_state *qp_state);<BR>+<BR>+void mlx4_qp_remove(struct
mlx4_dev *dev, struct mlx4_qp *qp);<BR>+<BR>+<BR>+int mlx4_srq_alloc(struct
mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,<BR>+ struct mlx4_mtt
*mtt, u64 db_rec, struct mlx4_srq *srq);<BR> void mlx4_srq_free(struct
mlx4_dev *dev, struct mlx4_srq *srq);<BR>+<BR>+void mlx4_srq_invalidate(struct
mlx4_dev *dev, struct mlx4_srq *srq);<BR>+void mlx4_srq_remove(struct mlx4_dev
*dev, struct mlx4_srq *srq);<BR>+<BR> int mlx4_srq_arm(struct mlx4_dev
*dev, struct mlx4_srq *srq, int limit_watermark);<BR> int
mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int
*limit_watermark);<BR> <BR>@@ -347,14 +474,29 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> int
mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8
gid[16]);<BR> int mlx4_multicast_detach(struct mlx4_dev *dev, struct
mlx4_qp *qp, u8 gid[16]);<BR> <BR>+int mlx4_register_mac(struct mlx4_dev
*dev, u8 port, u64 mac, int *index);<BR>+void mlx4_unregister_mac(struct
mlx4_dev *dev, u8 port, int index);<BR>+int mlx4_register_vlan(struct mlx4_dev
*dev, u8 port, u16 vlan, int *index);<BR>+void mlx4_unregister_vlan(struct
mlx4_dev *dev, u8 port, int index);<BR>+<BR> int mlx4_map_phys_fmr(struct
mlx4_dev *dev, struct mlx4_fmr *fmr, u64
*page_list,<BR> int npages, u64
iova, u32 *lkey, u32 *rkey);<BR>+int mlx4_map_phys_fmr_fbo(struct mlx4_dev *dev,
struct mlx4_fmr *fmr,<BR>+ u64 *page_list, int npages,
u64 iova,<BR>+ u32 fbo, u32 len, u32 *lkey, u32
*rkey);<BR> int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access,
int max_pages,<BR> int max_maps, u8 page_shift,
struct mlx4_fmr *fmr);<BR>+int mlx4_fmr_alloc_reserved(struct mlx4_dev *dev, u32
mridx, u32 pd,<BR>+ u32 access, int
max_pages, int max_maps,<BR>+ u8 page_shift,
struct mlx4_fmr *fmr);<BR> int mlx4_fmr_enable(struct mlx4_dev *dev, struct
mlx4_fmr *fmr);<BR> void mlx4_fmr_unmap(struct mlx4_dev *dev, struct
mlx4_fmr *fmr,<BR> u32 *lkey, u32
*rkey);<BR> int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr
*fmr);<BR>+int mlx4_fmr_free_reserved(struct mlx4_dev *dev, struct mlx4_fmr
*fmr);<BR> int mlx4_SYNC_TPT(struct mlx4_dev *dev);<BR> <BR>+int
mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int
reset_qkey_viols,<BR>+ u32 cap_mask);<BR>+<BR> #endif /*
MLX4_DEVICE_H */<BR>Index: mlx4/kernel/bus/inc/qp.h</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/inc/qp.h (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/inc/qp.h (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -52,7 +52,10
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> MLX4_QP_OPTPAR_RETRY_COUNT = 1 <<
12,<BR> MLX4_QP_OPTPAR_RNR_RETRY = 1 <<
13,<BR> MLX4_QP_OPTPAR_ACK_TIMEOUT = 1 <<
14,<BR>- MLX4_QP_OPTPAR_SCHED_QUEUE = 1 <<
16<BR>+ MLX4_QP_OPTPAR_SCHED_QUEUE = 1 <<
16,<BR>+ MLX4_QP_OPTPAR_RSS_RCA = 1 <<
17,<BR>+ MLX4_QP_OPTPAR_SRQN = 1 <<
18,<BR>+ MLX4_QP_OPTPAR_CQN_RCV = 1 <<
19<BR> };<BR> <BR> enum mlx4_qp_state {<BR>@@ -275,20 +278,21
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> __be32 byte_count;<BR> };<BR> <BR>-int
mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt
*mtt,<BR>- enum mlx4_qp_state cur_state, enum
mlx4_qp_state new_state,<BR>- struct mlx4_qp_context
*context, enum mlx4_qp_optpar optpar,<BR>- int
sqd_event, struct mlx4_qp *qp);<BR> <BR> int mlx4_qp_query(struct
mlx4_dev *dev, struct mlx4_qp *qp,<BR> struct
mlx4_qp_context *context);<BR> <BR>+<BR>+<BR>+int mlx4_qp_get_region(struct
mlx4_dev *dev,<BR>+ enum
qp_region region,<BR>+ int
*base_qpn, int *cnt);<BR>+ <BR> static inline struct mlx4_qp
*__mlx4_qp_lookup(struct mlx4_dev *dev, u32 qpn)<BR> {<BR>- return
radix_tree_lookup(&dev->qp_table_tree, qpn & (dev->caps.num_qps -
1));<BR>+ return (struct mlx4_qp
*)radix_tree_lookup(&dev->qp_table_tree, qpn & (dev->caps.num_qps
- 1));<BR> }<BR> <BR>-void mlx4_qp_remove(struct mlx4_dev *dev, struct
mlx4_qp *qp);<BR> <BR> struct mlx4_qp *mlx4_qp_lookup_locked(struct
mlx4_dev *dev, u32 qpn);<BR> <BR>Index:
mlx4/kernel/bus/net/alloc.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/alloc.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/alloc.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -38,15 +38,19
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> <BR> spin_lock(&bitmap->lock);<BR> <BR>- obj
= find_next_zero_bit(bitmap->table, bitmap->max,
bitmap->last);<BR>- if (obj >= bitmap->max) {<BR>+ obj =
find_next_zero_bit(bitmap->table,<BR>+
bitmap->effective_max,<BR>+
bitmap->last);<BR>+ if (obj >= bitmap->effective_max)
{<BR> bitmap->top = (bitmap->top + bitmap->max) &
bitmap->mask;<BR>- obj = find_first_zero_bit(bitmap->table,
bitmap->max);<BR>+ obj = find_first_zero_bit(bitmap->table,
bitmap->effective_max);<BR> }<BR> <BR>- if (obj <
bitmap->max) {<BR>+ if (obj < bitmap->effective_max)
{<BR> set_bit(obj,
bitmap->table);<BR>- bitmap->last = (obj + 1) &
(bitmap->max - 1);<BR>+ bitmap->last = (obj +
1);<BR>+ if (bitmap->last ==
bitmap->effective_max)<BR>+ bitmap->last =
0;<BR> obj |= bitmap->top;<BR> }
else<BR> obj = (u32)-1;<BR>@@ -67,10 +71,87
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> spin_unlock(&bitmap->lock);<BR> }<BR> <BR>-int
mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask, u32
reserved)<BR>+static unsigned long find_next_zero_string_aligned(unsigned long
*bitmap,<BR>+ u32 start, u32
nbits,<BR>+ int len, int
align)<BR> {<BR>+ unsigned long end,
i;<BR>+<BR>+again:<BR>+ start = ALIGN(start, align);<BR>+ while
((start < nbits) && test_bit(start, bitmap))<BR>+ start +=
align;<BR>+ if (start >= nbits)<BR>+ return
ULONG_MAX;<BR>+<BR>+ end = start+len;<BR>+ if (end >
nbits)<BR>+ return ULONG_MAX;<BR>+ for (i = start+1; i < end;
i++) {<BR>+ if (test_bit(i, bitmap)) {<BR>+ start =
i+1;<BR>+ goto
again;<BR>+ }<BR>+ }<BR>+ return start;<BR>+}<BR>+<BR>+u32
mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int
align)<BR>+{<BR>+ u32 obj;<BR> int i;<BR> <BR>+ if
(likely(cnt == 1 && align == 1))<BR>+ return
mlx4_bitmap_alloc(bitmap);<BR>+<BR>+ spin_lock(&bitmap->lock);<BR>+<BR>+ obj
= find_next_zero_string_aligned(bitmap->table,
bitmap->last,<BR>+
bitmap->effective_max, cnt, align);<BR>+ if (obj >=
bitmap->effective_max) {<BR>+ bitmap->top = (bitmap->top +
bitmap->max) & bitmap->mask;<BR>+ obj =
find_next_zero_string_aligned(bitmap->table,
0,<BR>+
bitmap->effective_max,<BR>+
cnt, align);<BR>+ }<BR>+<BR>+ if (obj < bitmap->effective_max)
{<BR>+ for (i = 0; i < cnt;
i++)<BR>+ set_bit(obj+i, bitmap->table);<BR>+ if
(obj == bitmap->last) {<BR>+ bitmap->last = (obj +
cnt);<BR>+ if (bitmap->last >=
bitmap->effective_max)<BR>+ bitmap->last =
0;<BR>+ }<BR>+ obj |= bitmap->top;<BR>+ }
else<BR>+ obj =
ULONG_MAX;<BR>+<BR>+ spin_unlock(&bitmap->lock);<BR>+<BR>+<BR>+ return
obj;<BR>+}<BR>+<BR>+void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32
obj, int cnt)<BR>+{<BR>+ int i;<BR>+<BR>+ obj &=
bitmap->max -
1;<BR>+<BR>+ spin_lock(&bitmap->lock);<BR>+ for (i = 0; i <
cnt; i++)<BR>+ clear_bit(obj+i,
bitmap->table);<BR>+ bitmap->last = min(bitmap->last,
obj);<BR>+ bitmap->top = (bitmap->top + bitmap->max) &
bitmap->mask;<BR>+ spin_unlock(&bitmap->lock);<BR>+}<BR>+int
mlx4_bitmap_init_with_effective_max(struct mlx4_bitmap
*bitmap,<BR>+ u32 num, u32 mask, u32
reserved,<BR>+ u32
effective_max)<BR>+{<BR>+ int i;<BR>+<BR> /* num must be a power
of 2 */<BR> if (num !=
roundup_pow_of_two(num))<BR> return -EINVAL;<BR>@@ -79,6 +160,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> bitmap->top = 0;<BR> bitmap->max
= num;<BR> bitmap->mask = mask;<BR>+ bitmap->effective_max
=
effective_max;<BR> spin_lock_init(&bitmap->lock);<BR> bitmap->table
= kzalloc(BITS_TO_LONGS(num) * sizeof (long), GFP_KERNEL);<BR> if
(!bitmap->table)<BR>@@ -90,6 +172,13 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> return
0;<BR> }<BR> <BR>+int mlx4_bitmap_init(struct mlx4_bitmap
*bitmap,<BR>+ u32 num, u32 mask, u32
reserved)<BR>+{<BR>+ return mlx4_bitmap_init_with_effective_max(bitmap,
num, mask,<BR>+ reserved,
num);<BR>+}<BR>+<BR> void mlx4_bitmap_cleanup(struct mlx4_bitmap
*bitmap)<BR> {<BR> kfree(bitmap->table);<BR>@@ -182,3
+271,166 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> }<BR> EXPORT_SYMBOL_GPL(mlx4_buf_free);<BR>+<BR>+static
struct mlx4_db_pgdir *mlx4_alloc_db_pgdir(struct mlx4_dev
*dev)<BR>+{<BR>+ struct mlx4_db_pgdir *pgdir;<BR>+<BR>+ pgdir =
kzalloc(sizeof *pgdir, GFP_KERNEL);<BR>+ if (!pgdir)<BR>+ return
NULL;<BR>+<BR>+ bitmap_fill(pgdir->order1, MLX4_DB_PER_PAGE /
2);<BR>+ pgdir->bits[0] = pgdir->order0;<BR>+ pgdir->bits[1]
= pgdir->order1;<BR>+<BR>+ <BR>+ pgdir->db_page =
dma_alloc_coherent(&dev->pdev->dev,
PAGE_SIZE,<BR>+
&pgdir->db_dma, GFP_KERNEL);<BR>+ if (!pgdir->db_page)
{<BR>+ kfree(pgdir);<BR>+ return
NULL;<BR>+ }<BR>+<BR>+ return pgdir;<BR>+}<BR>+<BR>+static int
mlx4_alloc_db_from_pgdir(struct mlx4_db_pgdir
*pgdir,<BR>+ struct mlx4_db *db, int
order)<BR>+{<BR>+ int o;<BR>+ int i;<BR>+<BR>+ for (o = order; o
<= 1; ++o) {<BR>+ i = find_first_bit(pgdir->bits[o],
MLX4_DB_PER_PAGE >> o);<BR>+ if (i < MLX4_DB_PER_PAGE
>> o)<BR>+ goto found;<BR>+ }<BR>+<BR>+ return
-ENOMEM;<BR>+<BR>+found:<BR>+ clear_bit(i,
pgdir->bits[o]);<BR>+<BR>+ i <<= o;<BR>+<BR>+ if (o >
order)<BR>+ set_bit(i ^ 1,
pgdir->bits[order]);<BR>+<BR>+ db->pgdir =
pgdir;<BR>+ db->index =
i;<BR>+ db->db = pgdir->db_page +
db->index;<BR>+ db->dma.da =
pgdir->db_dma.da + db->index * 4;<BR>+ db->dma.va = (VOID
*)(UINT_PTR)-1;<BR>+ db->dma.sz =
ULONG_MAX;<BR>+ db->order = order;<BR>+<BR>+ return
0;<BR>+}<BR>+<BR>+int mlx4_db_alloc(struct mlx4_dev *dev,
<BR>+ struct mlx4_db *db, int
order)<BR>+{<BR>+ struct mlx4_priv *priv = mlx4_priv(dev);<BR>+ struct
mlx4_db_pgdir *pgdir;<BR>+ int ret = 0;<BR>+ int ret1 =
0;<BR>+<BR>+ mutex_lock(&priv->pgdir_mutex);<BR>+<BR>+ list_for_each_entry(pgdir,
&priv->pgdir_list, list, struct mlx4_db_pgdir)<BR>+ if
(!mlx4_alloc_db_from_pgdir(pgdir, db, order))<BR>+ goto
out;<BR>+<BR>+ pgdir = mlx4_alloc_db_pgdir(dev);<BR>+ if (!pgdir)
{<BR>+ ret = -ENOMEM;<BR>+ goto
out;<BR>+ }<BR>+<BR>+ list_add(&pgdir->list,
&priv->pgdir_list);<BR>+<BR>+ /* This should never fail -- we just
allocated an empty page: */<BR>+ ret1 = mlx4_alloc_db_from_pgdir(pgdir, db,
order);<BR>+ ASSERT(ret1 ==
0);<BR>+<BR>+out:<BR>+ mutex_unlock(&priv->pgdir_mutex);<BR>+<BR>+ return
ret;<BR>+}<BR>+<BR>+void mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db
*db)<BR>+{<BR>+ struct mlx4_priv *priv = mlx4_priv(dev);<BR>+ int
o;<BR>+ int
i;<BR>+<BR>+ mutex_lock(&priv->pgdir_mutex);<BR>+<BR>+ o =
db->order;<BR>+ i = db->index;<BR>+<BR>+ if (db->order == 0
&& test_bit(i ^ 1, db->pgdir->order0))
{<BR>+ clear_bit(i ^ 1,
db->pgdir->order0);<BR>+ ++o;<BR>+ }<BR>+<BR>+ i
>>= o;<BR>+ set_bit(i, db->pgdir->bits[o]);<BR>+<BR>+ if
(bitmap_full(db->pgdir->order1, MLX4_DB_PER_PAGE / 2))
{<BR>+<BR>+ dma_free_coherent(&dev->pdev->dev,
PAGE_SIZE,<BR>+ db->pgdir->db_page,
db->pgdir->db_dma);<BR>+ list_del(&db->pgdir->list);<BR>+ kfree(db->pgdir);<BR>+ }<BR>+<BR>+ mutex_unlock(&priv->pgdir_mutex);<BR>+}<BR>+<BR>+int
mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources
*wqres,<BR>+ int size, int
max_direct)<BR>+{<BR>+ int err;<BR>+<BR>+ err = mlx4_db_alloc(dev,
&wqres->db, 1);<BR>+ if (err)<BR>+ return
err;<BR>+ *wqres->db.db = 0;<BR>+<BR>+ if (mlx4_buf_alloc(dev,
size, max_direct, &wqres->buf)) {<BR>+ err =
-ENOMEM;<BR>+ goto err_db;<BR>+ }<BR>+<BR>+ err =
mlx4_mtt_init(dev, wqres->buf.npages,
wqres->buf.page_shift,<BR>+
&wqres->mtt);<BR>+ if (err)<BR>+ goto
err_buf;<BR>+ err = mlx4_buf_write_mtt(dev, &wqres->mtt,
&wqres->buf);<BR>+ if (err)<BR>+ goto
err_mtt;<BR>+<BR>+ return
0;<BR>+<BR>+err_mtt:<BR>+ mlx4_mtt_cleanup(dev,
&wqres->mtt);<BR>+err_buf:<BR>+ mlx4_buf_free(dev, size,
&wqres->buf);<BR>+err_db:<BR>+ mlx4_db_free(dev,
&wqres->db);<BR>+ return
err;<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_alloc_hwq_res);<BR>+<BR>+void
mlx4_free_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources
*wqres,<BR>+ int
size)<BR>+{<BR>+ mlx4_mtt_cleanup(dev,
&wqres->mtt);<BR>+ mlx4_buf_free(dev, size,
&wqres->buf);<BR>+ mlx4_db_free(dev,
&wqres->db);<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_free_hwq_res);<BR>+<BR>Index:
mlx4/kernel/bus/net/cmd.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/cmd.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/cmd.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -515,3 +515,12
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> kfree(mailbox);<BR> }<BR> EXPORT_SYMBOL_GPL(mlx4_free_cmd_mailbox);<BR>+<BR>+//
This is the interface version of this function<BR>+int imlx4_cmd(struct mlx4_dev
*dev, u64 in_param, u64 *out_param, int out_is_imm,<BR>+ u32
in_modifier, u8 op_modifier, u16 op, unsigned long
timeout)<BR>+{<BR>+ return __mlx4_cmd(dev, in_param, out_param, out_is_imm,
in_modifier,<BR>+ op_modifier, op,
timeout);<BR>+}<BR>+<BR>Index: mlx4/kernel/bus/net/cq.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/cq.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/cq.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -117,7 +117,8
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> <BR> int mlx4_cq_alloc(struct mlx4_dev *dev, int
nent, struct mlx4_mtt *mtt,<BR>- struct mlx4_uar *uar, u64
db_rec, struct mlx4_cq *cq)<BR>+ struct mlx4_uar *uar, u64
db_rec, struct mlx4_cq *cq,<BR>+ unsigned vector, int
collapsed)<BR> {<BR> struct mlx4_priv *priv =
mlx4_priv(dev);<BR> struct mlx4_cq_table *cq_table =
&priv->cq_table;<BR>@@ -126,6 +127,10 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> u64
mtt_addr;<BR> int
err;<BR> <BR>+ UNREFERENCED_PARAMETER(vector);<BR>+#define
COLLAPSED_SHIFT 18<BR>+#define
ENTRIES_SHIFT 24<BR>+<BR> cq->cqn =
mlx4_bitmap_alloc(&cq_table->bitmap);<BR> if (cq->cqn ==
-1)<BR> return -ENOMEM;<BR>@@ -153,7 +158,9
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> cq_context = (struct mlx4_cq_context
*)mailbox->buf;<BR> memset(cq_context, 0, sizeof
*cq_context);<BR> <BR>- cq_context->logsize_usrpage =
cpu_to_be32((ilog2(nent) << 24) |
uar->index);<BR>+ cq_context->flags = cpu_to_be32(!!collapsed
<< COLLAPSED_SHIFT);<BR>+ cq_context->logsize_usrpage =
cpu_to_be32(<BR>+ (ilog2(nent) <<
ENTRIES_SHIFT) |
uar->index);<BR> cq_context->comp_eqn
=
(u8)priv->eq_table.eq[MLX4_EQ_COMP].eqn;<BR> cq_context->log_page_size
= (u8)(mtt->page_shift - MLX4_ICM_PAGE_SHIFT);<BR> <BR>Index:
mlx4/kernel/bus/net/fw.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/fw.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/fw.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -308,7 +308,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> MLX4_GET(field, outbox,
QUERY_DEV_CAP_VL_PORT_OFFSET);<BR> dev_cap->max_vl[i]
= field >> 4;<BR> MLX4_GET(field, outbox,
QUERY_DEV_CAP_MTU_WIDTH_OFFSET);<BR>- dev_cap->max_mtu[i]
= field >>
4;<BR>+ dev_cap->ib_mtu[i] = field
>> 4;
<BR> dev_cap->max_port_width[i] = field &
0xf;<BR> MLX4_GET(field, outbox,
QUERY_DEV_CAP_MAX_GID_OFFSET);<BR> dev_cap->max_gids[i]
= 1 << (field & 0xf);<BR>@@ -316,9 +316,11 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> dev_cap->max_pkeys[i] = 1
<< (field & 0xf);<BR> }<BR> } else
{<BR>+#define QUERY_PORT_SUPPORTED_TYPE_OFFSET 0x00<BR> #define
QUERY_PORT_MTU_OFFSET 0x01<BR> #define
QUERY_PORT_WIDTH_OFFSET 0x06<BR> #define
QUERY_PORT_MAX_GID_PKEY_OFFSET 0x07<BR>+#define
QUERY_PORT_MAX_MACVLAN_OFFSET 0x0a<BR> #define
QUERY_PORT_MAX_VL_OFFSET 0x0b<BR> <BR> for (i =
1; i <= dev_cap->num_ports; ++i) {<BR>@@ -328,7 +330,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> goto
out;<BR> <BR> MLX4_GET(field, outbox,
QUERY_PORT_MTU_OFFSET);<BR>- dev_cap->max_mtu[i]
= field & 0xf;<BR>+ dev_cap->ib_mtu[i]
= field & 0xf;<BR> MLX4_GET(field, outbox,
QUERY_PORT_WIDTH_OFFSET);<BR> dev_cap->max_port_width[i]
= field & 0xf;<BR> MLX4_GET(field, outbox,
QUERY_PORT_MAX_GID_PKEY_OFFSET);<BR>@@ -336,6 +338,14 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> dev_cap->max_pkeys[i] = 1
<< (field & 0xf);<BR> MLX4_GET(field, outbox,
QUERY_PORT_MAX_VL_OFFSET);<BR> dev_cap->max_vl[i]
= field & 0xf;<BR>+ MLX4_GET(field,
outbox,<BR>+
QUERY_PORT_SUPPORTED_TYPE_OFFSET);<BR>+ dev_cap->supported_port_types[i]
= field & 3;<BR>+ MLX4_GET(field, outbox,
QUERY_PORT_MAX_MACVLAN_OFFSET);<BR>+ dev_cap->log_max_macs[i]
= field & 0xf;<BR>+ dev_cap->log_max_vlans[i] = field
>> 4;<BR>+ dev_cap->eth_mtu[i] = be16_to_cpu(((u16 *)
outbox)[1]);<BR>+ dev_cap->def_mac[i] = be64_to_cpu(((u64 *)
outbox)[2]);<BR> }<BR> }<BR> <BR>@@ -373,7
+383,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> mlx4_dbg(dev, "Max CQEs: %d, max WQEs: %d, max SRQ WQEs:
%d\n",<BR> dev_cap->max_cq_sz, dev_cap->max_qp_sz,
dev_cap->max_srq_sz);<BR> mlx4_dbg(dev, "Local CA ACK delay: %d,
max MTU: %d, port width cap: %d\n",<BR>-
dev_cap->local_ca_ack_delay, 128 <<
dev_cap->max_mtu[1],<BR>+ dev_cap->local_ca_ack_delay, 128
<< dev_cap->ib_mtu[1],<BR>
dev_cap->max_port_width[1]);<BR> mlx4_dbg(dev, "Max SQ desc size:
%d, max SQ S/G: %d\n",<BR> dev_cap->max_sq_desc_sz,
dev_cap->max_sq_sg);<BR>@@ -706,7 +716,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> *(inbox
+ INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1);<BR> <BR> /*
Enable QoS support if module parameter set */<BR>- if
(g.enable_qos)<BR>+ if (g.mod_enable_qos)<BR> *(inbox +
INIT_HCA_FLAGS_OFFSET / 4) |= cpu_to_be32(1 <<
2);<BR> <BR> /* QPC/EEC/CQC/EQC/RDMARC attributes */<BR>@@
-787,7 +797,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> flags |= (dev->caps.port_width_cap[port] & 0xf)
<< INIT_PORT_PORT_WIDTH_SHIFT;<BR> MLX4_PUT(inbox,
flags,
INIT_PORT_FLAGS_OFFSET);<BR> <BR>- field = (u16)(128 <<
dev->caps.mtu_cap[port]);<BR>+ field = (u16)(128 <<
dev->caps.ib_mtu_cap[port]);<BR> MLX4_PUT(inbox, field,
INIT_PORT_MTU_OFFSET);<BR> field =
(u16)dev->caps.gid_table_len[port];<BR> MLX4_PUT(inbox,
field, INIT_PORT_MAX_GID_OFFSET);<BR>Index:
mlx4/kernel/bus/net/fw.h</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/fw.h (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/fw.h (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -61,11 +61,13
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> int
local_ca_ack_delay;<BR> int num_ports;<BR> u32
max_msg_sz;<BR>- int max_mtu[MLX4_MAX_PORTS + 1];<BR>+ int
ib_mtu[MLX4_MAX_PORTS + 1]; <BR> int
max_port_width[MLX4_MAX_PORTS + 1];<BR> int max_vl[MLX4_MAX_PORTS +
1];<BR> int max_gids[MLX4_MAX_PORTS + 1];<BR> int
max_pkeys[MLX4_MAX_PORTS + 1];<BR>+ u64 def_mac[MLX4_MAX_PORTS +
1];<BR>+ int eth_mtu[MLX4_MAX_PORTS + 1];<BR> u16
stat_rate_support;<BR> u32 flags;<BR> int
reserved_uars;<BR>@@ -96,6 +98,10 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> u8
bmme_flags;<BR> u32 reserved_lkey;<BR> u64
max_icm_sz;<BR>+ u8 supported_port_types[MLX4_MAX_PORTS +
1];<BR>+ u8 log_max_macs[MLX4_MAX_PORTS + 1];<BR>+ u8
log_max_vlans[MLX4_MAX_PORTS + 1];<BR>+
<BR> };<BR> <BR> struct mlx4_adapter {<BR>Index:
mlx4/kernel/bus/net/main.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/main.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/main.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -58,13 +58,14
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> <BR> #endif /* CONFIG_PCI_MSI
*/<BR> <BR>+<BR> static struct mlx4_profile default_profile =
{<BR> 1 << 17, /* num_qp */<BR> 1
<< 4, /* rdmarc_per_qp */<BR> 1 <<
16, /* num_srq */<BR> 1 << 16, /*
num_cq */<BR> 1 << 13, /*
num_mcg */<BR>- 1 << 17, /* num_mpt */<BR>+ 1
<< 18, /* num_mpt */ <BR> 1 << 20 /*
num_mtt */<BR> };<BR> <BR>@@ -103,11 +104,68
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> };<BR> #define MLX4_PCI_TABLE_SIZE
(sizeof(mlx4_pci_table)/sizeof(struct pci_device_id))<BR> <BR>+<BR>+static
int mlx4_check_port_params(struct mlx4_dev
*dev,<BR>+ enum mlx4_port_type
*port_type)<BR>+{<BR>+ if (port_type[0] != port_type[1]
&&<BR>+ !(dev->caps.flags &
MLX4_DEV_CAP_FLAG_DPDP)) {<BR>+ mlx4_err(dev, "Only same port types
supported "<BR>+ "on this HCA,
aborting.\n");<BR>+ return -EINVAL;<BR>+ }<BR>+ if
((port_type[0] == MLX4_PORT_TYPE_ETH) &&<BR>+
(port_type[1] == MLX4_PORT_TYPE_IB)) {<BR>+ mlx4_err(dev, "eth-ib
configuration is not supported.\n");<BR>+ return
-EINVAL;<BR>+ }<BR>+ return 0;<BR>+}<BR>+<BR>+static void
mlx4_str2port_type(WCHAR
**port_str,<BR>+ enum
mlx4_port_type *port_type)<BR>+{<BR>+ int i;<BR>+<BR>+ for (i = 0; i
< MLX4_MAX_PORTS; i++) {<BR>+ if (!wcscmp(port_str[i],
L"eth"))<BR>+ port_type[i] =
MLX4_PORT_TYPE_ETH;<BR>+ else<BR>+ port_type[i] =
MLX4_PORT_TYPE_IB;<BR>+ }<BR>+}<BR>+<BR>+int
mlx4_count_ib_ports()<BR>+{<BR>+ int i;<BR>+ int count =
0;<BR>+<BR>+ for (i = 0; i < MLX4_MAX_PORTS; i++) {<BR>+ if
(g.mod_port_type[i] == MLX4_PORT_TYPE_IB)
{<BR>+ count++;<BR>+ }<BR>+ }<BR>+ return
count;<BR>+}<BR>+<BR>+BOOLEAN mlx4_is_eth_port(int
port_number)<BR>+{<BR>+ if (g.mod_port_type[port_number] ==
MLX4_PORT_TYPE_IB) {<BR>+ return FALSE;<BR>+ }<BR>+ return
TRUE;<BR>+}<BR>+<BR> static int mlx4_dev_cap(struct mlx4_dev *dev, struct
mlx4_dev_cap *dev_cap)<BR> {<BR> int err;<BR> int
i;<BR>+ int num_eth_ports = 0;<BR>+ enum mlx4_port_type
port_type[MLX4_MAX_PORTS];<BR> <BR>+ for (i = 0; i <
MLX4_MAX_PORTS; i++) <BR>+ port_type[i] =
g.mod_port_type[i];<BR>+<BR> err = mlx4_QUERY_DEV_CAP(dev,
dev_cap);<BR> if (err) {<BR> mlx4_err(dev,
"QUERY_DEV_CAP command failed, aborting.\n");<BR>@@ -138,10 +196,12
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> dev->caps.num_ports =
dev_cap->num_ports;<BR> for (i = 1; i <=
dev->caps.num_ports; ++i)
{<BR> dev->caps.vl_cap[i] =
dev_cap->max_vl[i];<BR>- dev->caps.mtu_cap[i]
=
dev_cap->max_mtu[i];<BR>+ dev->caps.ib_mtu_cap[i]
= dev_cap->ib_mtu[i];
<BR> dev->caps.gid_table_len[i] =
dev_cap->max_gids[i];<BR> dev->caps.pkey_table_len[i] =
dev_cap->max_pkeys[i];<BR> dev->caps.port_width_cap[i] =
(u8)dev_cap->max_port_width[i];<BR>+ dev->caps.eth_mtu_cap[i]
=
dev_cap->eth_mtu[i];<BR>+ dev->caps.def_mac[i]
= dev_cap->def_mac[i];
<BR> }<BR> <BR> dev->caps.num_uars
= dev_cap->uar_size / PAGE_SIZE;<BR>@@ -152,7 +212,6 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> dev->caps.max_rq_sg =
dev_cap->max_rq_sg;<BR> dev->caps.max_wqes
=
dev_cap->max_qp_sz;<BR> dev->caps.max_qp_init_rdma
=
dev_cap->max_requester_per_qp;<BR>- dev->caps.reserved_qps
=
dev_cap->reserved_qps;<BR> dev->caps.max_srq_wqes
=
dev_cap->max_srq_sz;<BR> dev->caps.max_srq_sge
= dev_cap->max_rq_sg -
1;<BR> dev->caps.reserved_srqs =
dev_cap->reserved_srqs;<BR>@@ -178,6 +237,55 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> dev->caps.flags =
dev_cap->flags;<BR> dev->caps.stat_rate_support =
dev_cap->stat_rate_support;<BR> <BR>+ dev->caps.log_num_macs
=
ilog2(roundup_pow_of_two<BR>+ (g.mod_num_mac +
1));<BR>+ dev->caps.log_num_vlans =
ilog2(roundup_pow_of_two<BR>+ (g.mod_num_vlan +
2));<BR>+ dev->caps.log_num_prios = (g.mod_use_prio)? 3:
0;<BR>+<BR>+ err = mlx4_check_port_params(dev, port_type);<BR>+ if
(err)<BR>+ return err;<BR>+<BR>+ for (i = 1; i <=
dev->caps.num_ports; ++i) {<BR>+ if
(!dev_cap->supported_port_types[i]) {<BR>+ mlx4_warn(dev,
"FW doesn't support Multi Protocol,
"<BR>+ "loading IB
only\n");<BR>+ dev->caps.port_type[i] =
MLX4_PORT_TYPE_IB;<BR>+ continue;<BR>+ }<BR>+ if
(port_type[i-1] &
dev_cap->supported_port_types[i])<BR>+ dev->caps.port_type[i]
= port_type[i-1];<BR>+ else {<BR>+ mlx4_err(dev,
"Requested port type for port %d
"<BR>+ "not supported by
HW\n", i);<BR>+ return
-ENODEV;<BR>+ }<BR>+ if (dev->caps.log_num_macs >
dev_cap->log_max_macs[i]) {<BR>+ dev->caps.log_num_macs =
dev_cap->log_max_macs[i];<BR>+ mlx4_warn(dev, "Requested
number of MACs is too much
"<BR>+ "for port %d,
reducing to %d.\n",<BR>+ i, 1 <<
dev->caps.log_num_macs);<BR>+ }<BR>+ if
(dev->caps.log_num_vlans > dev_cap->log_max_vlans[i])
{<BR>+ dev->caps.log_num_vlans =
dev_cap->log_max_vlans[i];<BR>+ mlx4_warn(dev, "Requested
number of VLANs is too much
"<BR>+ "for port %d,
reducing to %d.\n",<BR>+ i, 1 <<
dev->caps.log_num_vlans);<BR>+ }<BR>+ if
(dev->caps.port_type[i] ==
MLX4_PORT_TYPE_ETH)<BR>+ ++num_eth_ports;<BR>+ }<BR>+<BR>+ dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]
=
dev_cap->reserved_qps;<BR>+ dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR]
=<BR>+ dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR]
=<BR>+ (1 << dev->caps.log_num_macs)*<BR>+ (1
<< dev->caps.log_num_vlans)*<BR>+ (1 <<
dev->caps.log_num_prios)*<BR>+ num_eth_ports;<BR>+ dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]
= MLX4_NUM_FEXCH;<BR>+<BR> return 0;<BR> }<BR> <BR>@@
-226,7 +334,8 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> ((u64) (MLX4_CMPT_TYPE_QP
*<BR> cmpt_entry_sz) <<
MLX4_CMPT_SHIFT),<BR> cmpt_entry_sz,
dev->caps.num_qps,<BR>-
dev->caps.reserved_qps, 0, 0);<BR>+
dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],<BR>+
0, 0);<BR> if (err)<BR> goto err;<BR> <BR>@@
-356,7 +465,8 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>
init_hca->qpc_base,<BR>
dev_cap->qpc_entry_sz,<BR>
dev->caps.num_qps,<BR>-
dev->caps.reserved_qps, 0, 0);<BR>+
dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],<BR>+
0, 0);<BR> if (err) {<BR> mlx4_err(dev, "Failed to
map QP context memory, aborting.\n");<BR> goto
err_unmap_dmpt;<BR>@@ -366,7 +476,8 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>
init_hca->auxc_base,<BR>
dev_cap->aux_entry_sz,<BR>
dev->caps.num_qps,<BR>-
dev->caps.reserved_qps, 0, 0);<BR>+
dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],<BR>+
0, 0);<BR> if (err) {<BR> mlx4_err(dev, "Failed to
map AUXC context memory, aborting.\n");<BR> goto
err_unmap_qp;<BR>@@ -376,7 +487,8 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>
init_hca->altc_base,<BR>
dev_cap->altc_entry_sz,<BR>
dev->caps.num_qps,<BR>-
dev->caps.reserved_qps, 0, 0);<BR>+
dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],<BR>+
0, 0);<BR> if (err) {<BR> mlx4_err(dev, "Failed to
map ALTC context memory, aborting.\n");<BR> goto
err_unmap_auxc;<BR>@@ -386,7 +498,8 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>
init_hca->rdmarc_base,<BR>
dev_cap->rdmarc_entry_sz <<
priv->qp_table.rdmarc_shift,<BR>
dev->caps.num_qps,<BR>-
dev->caps.reserved_qps, 0, 0);<BR>+
dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],<BR>+
0, 0);<BR> if (err) {<BR> mlx4_err(dev, "Failed to
map RDMARC context memory, aborting\n");<BR> goto
err_unmap_altc;<BR>@@ -579,6 +692,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> {<BR> struct mlx4_priv *priv =
mlx4_priv(dev);<BR> int err;<BR>+ u8
port;<BR> <BR> err = mlx4_init_uar_table(dev);<BR> if
(err) {<BR>@@ -677,8 +791,23 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> "multicast group table,
aborting.\n");<BR> goto
err_qp_table_free;<BR> }<BR>+ for (port = 1; port <=
dev->caps.num_ports; port++) {<BR>+ err = mlx4_SET_PORT(dev,
port,0 ,0);<BR>+ if (err) {<BR>+ mlx4_err(dev,
"Failed to set port %d, aborting\n",<BR>+
port);<BR>+ goto
err_mcg_table_free;<BR>+ }<BR>+ }<BR> <BR>+ for (port
= 0; port < dev->caps.num_ports; port++)
{<BR>+ mlx4_init_mac_table(dev,
port);<BR>+ mlx4_init_vlan_table(dev,
port);<BR>+ }<BR>+<BR> return
0;<BR>+err_mcg_table_free:<BR>+ mlx4_cleanup_mcg_table(dev);<BR> <BR> err_qp_table_free:<BR> mlx4_cleanup_qp_table(dev);<BR>@@
-811,6 +940,9 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> INIT_LIST_HEAD(&priv->ctx_list);<BR> spin_lock_init(&priv->ctx_lock);<BR> <BR>+ INIT_LIST_HEAD(&priv->pgdir_list);<BR>+ mutex_init(&priv->pgdir_mutex);<BR>+<BR> /*
deal with livefish, if any
*/<BR> dev =
&priv->dev;<BR> dev->pdev = pdev;<BR>Index:
mlx4/kernel/bus/net/mcg.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/mcg.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/mcg.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -211,7 +211,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> <BR> mgm->qp[members_count++]
= cpu_to_be32((qp->qpn & MGM_QPN_MASK)
|<BR>-
(!!g.mlx4_blck_lb <<
MGM_BLCK_LB_BIT));<BR>+
(!!g.mod_mlx4_blck_lb <<
MGM_BLCK_LB_BIT));<BR> <BR> mgm->members_count
= cpu_to_be32(members_count);<BR> <BR>Index:
mlx4/kernel/bus/net/mlx4.h</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/mlx4.h (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/mlx4.h (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -60,6 +60,12
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> // Driver
global data<BR> //<BR> <BR>+enum mlx4_port_type
{<BR>+ MLX4_PORT_TYPE_IB = 1 <<
0,<BR>+ MLX4_PORT_TYPE_ETH = 1 <<
1,<BR>+};<BR>+<BR>+<BR> #pragma warning(disable:4201) // nameless
struct/union<BR> typedef struct _GLOBALS
{<BR> BUS_WMI_STD_DATA;<BR>@@ -71,9 +77,14 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> int
mod_num_mcg;<BR> int mod_num_mpt;<BR> int
mod_num_mtt;<BR>+ int mod_num_mac;<BR>+ int
mod_num_vlan;<BR>+ int mod_use_prio;<BR> <BR>- int
enable_qos;<BR>- int mlx4_blck_lb;<BR>+ int
mod_enable_qos;<BR>+ int mod_mlx4_blck_lb;<BR>+ enum mlx4_port_type
mod_port_type[MLX4_MAX_PORTS];<BR>+ <BR> } GLOBALS;<BR> #pragma
warning(default:4201) // nameless struct/union<BR> <BR>@@ -122,6 +133,7
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> u32 last;<BR> u32 top;<BR> u32 max;<BR>+ u32 effective_max;<BR> u32 mask;<BR> spinlock_t lock;<BR> unsigned
long *table;<BR>@@ -271,6 +283,35
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> LARGE_INTEGER interval;<BR> };<BR> <BR>+struct
mlx4_mac_table {<BR>+#define MLX4_MAX_MAC_NUM 128<BR>+#define
MLX4_MAC_MASK 0xffffffffffff<BR>+#define
MLX4_MAC_VALID_SHIFT 63<BR>+#define
MLX4_MAC_TABLE_SIZE MLX4_MAX_MAC_NUM << 3<BR>+ __be64
entries[MLX4_MAX_MAC_NUM];<BR>+ int
refs[MLX4_MAX_MAC_NUM];<BR>+ struct semaphore mac_sem;<BR>+ int
total;<BR>+ int max;<BR>+};<BR>+<BR>+struct mlx4_vlan_table {<BR>+#define
MLX4_MAX_VLAN_NUM 126<BR>+#define
MLX4_VLAN_MASK 0xfff<BR>+#define MLX4_VLAN_VALID 1
<< 31<BR>+#define MLX4_VLAN_TABLE_SIZE MLX4_MAX_VLAN_NUM <<
2<BR>+ __be32 entries[MLX4_MAX_VLAN_NUM];<BR>+ int
refs[MLX4_MAX_VLAN_NUM];<BR>+ struct semaphore vlan_sem;<BR>+ int
total;<BR>+ int max;<BR>+};<BR>+<BR>+struct mlx4_port_info
{<BR>+ struct mlx4_mac_table mac_table;<BR>+ struct
mlx4_vlan_table vlan_table;<BR>+};<BR>+<BR> struct mlx4_priv
{<BR> struct mlx4_dev dev;<BR> <BR>@@ -278,6 +319,9
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> struct
list_head ctx_list;<BR> spinlock_t ctx_lock;<BR> <BR>+ struct
list_head pgdir_list;<BR>+ struct
mutex
pgdir_mutex;<BR>+<BR> struct
mlx4_fw fw;<BR> struct
mlx4_cmd cmd;<BR> <BR>@@ -296,6 +340,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> <BR> struct
mlx4_uar driver_uar;<BR> void
__iomem *kar;<BR>+ struct
mlx4_port_info port[MLX4_MAX_PORTS];<BR> };<BR> <BR> static
inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)<BR>@@ -305,9 +350,17
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> <BR> u32
mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);<BR> void
mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj);<BR>+u32
mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int
align);<BR>+void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int
cnt);<BR> int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32
mask, u32 reserved);<BR>+int mlx4_bitmap_init_with_effective_max(struct
mlx4_bitmap *bitmap,<BR>+ u32 num, u32 mask, u32
reserved,<BR>+ u32 effective_max);<BR> void
mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap);<BR> <BR>+int
mlx4_db_alloc(struct mlx4_dev *dev, <BR>+ struct mlx4_db
*db, int order);<BR>+<BR> int mlx4_init_pd_table(struct mlx4_dev
*dev);<BR> int mlx4_init_uar_table(struct mlx4_dev *dev);<BR> int
mlx4_init_mr_table(struct mlx4_dev *dev);<BR>@@ -336,6 +389,9
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> void
mlx4_intf_init();<BR> void mlx4_net_init();<BR> <BR>+BOOLEAN
mlx4_is_eth_port(int port_number);<BR>+int
mlx4_count_ib_ports();<BR>+<BR> struct mlx4_dev_cap;<BR> struct
mlx4_init_hca_param;<BR> <BR>@@ -353,9 +409,16 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> int
mlx4_cmd_use_events(struct mlx4_dev *dev);<BR> void
mlx4_cmd_use_polling(struct mlx4_dev *dev);<BR> <BR>+int
mlx4_qp_get_region(struct mlx4_dev
*dev,<BR>+ enum qp_region
region,<BR>+ int *base_qpn, int
*cnt);<BR>+<BR> void mlx4_cq_completion(struct mlx4_dev *dev, u32
cqn);<BR> void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int
event_type);<BR> <BR>+void mlx4_init_mac_table(struct mlx4_dev *dev, u8
port);<BR>+void mlx4_init_vlan_table(struct mlx4_dev *dev, u8
port);<BR>+<BR> void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int
event_type);<BR> <BR> void mlx4_srq_event(struct mlx4_dev *dev, u32
srqn, int event_type);<BR>@@ -366,5 +429,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> <BR> void
mlx4_remove_one(struct pci_dev *pdev);<BR> <BR>+#define
ETH_FCS_LEN 4 /* Frame Check Sequence Length
*/<BR>+#define ETH_HLEN 14<BR> <BR> #endif /* MLX4_H */<BR>Index:
mlx4/kernel/bus/net/mr.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/mr.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/mr.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -434,8 +434,18
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> struct
mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table;<BR> int
err;<BR> <BR>- err = mlx4_bitmap_init(&mr_table->mpt_bitmap,
dev->caps.num_mpts,<BR>- (u32)~0,
(u32)dev->caps.reserved_mrws);<BR>+ if
(!is_power_of_2(dev->caps.num_mpts))<BR>+ return
-EINVAL;<BR>+<BR>+ dev->caps.reserved_fexch_mpts_base =
dev->caps.num_mpts -<BR>+ (2 *
dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]);<BR>+ err =
mlx4_bitmap_init_with_effective_max(&mr_table->mpt_bitmap,<BR>+ dev->caps.num_mpts,<BR>+ (u32)~0,
dev->caps.reserved_mrws,<BR>+ dev->caps.reserved_fexch_mpts_base);<BR>+<BR>+<BR>+<BR> if
(err)<BR> return err;<BR> <BR>Index:
mlx4/kernel/bus/net/port.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/port.c (revision 0)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/port.c (revision 0)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -0,0 +1,289
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+/*<BR>+ * Copyright
(c) 2007 Mellanox Technologies. All rights reserved.<BR>+ *<BR>+ * This software
is available to you under a choice of one of two<BR>+ * licenses. You may
choose to be licensed under the terms of the GNU<BR>+ * General Public License
(GPL) Version 2, available from the file<BR>+ * COPYING in the main directory of
this source tree, or the<BR>+ * OpenIB.org BSD license below:<BR>+ *<BR>+
* Redistribution and use in source and binary forms,
with or<BR>+ * without modification, are permitted
provided that the following<BR>+ * conditions are
met:<BR>+ *<BR>+ * - Redistributions of source
code must retain the above<BR>+ *
copyright notice, this list of conditions and the following<BR>+
* disclaimer.<BR>+ *<BR>+
* - Redistributions in binary form must reproduce
the above<BR>+ * copyright notice,
this list of conditions and the following<BR>+
* disclaimer in the documentation
and/or other materials<BR>+ * provided
with the distribution.<BR>+ *<BR>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT
WARRANTY OF ANY KIND,<BR>+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE WARRANTIES OF<BR>+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
AND<BR>+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS<BR>+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
AN<BR>+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN<BR>+
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE<BR>+ *
SOFTWARE.<BR>+ *<BR>+ */<BR>+<BR>+#include "mlx4.h"<BR>+#include
"cmd.h"<BR>+<BR>+<BR>+void mlx4_init_mac_table(struct mlx4_dev *dev, u8
port)<BR>+{<BR>+ struct mlx4_mac_table *table =
&mlx4_priv(dev)->port[port].mac_table;<BR>+ int
i;<BR>+<BR>+ sema_init(&table->mac_sem, 1);<BR>+ for (i = 0; i
< MLX4_MAX_MAC_NUM; i++) {<BR>+ table->entries[i] =
0;<BR>+ table->refs[i] = 0;<BR>+ }<BR>+ table->max =
1 << dev->caps.log_num_macs;<BR>+ table->total =
0;<BR>+}<BR>+<BR>+void mlx4_init_vlan_table(struct mlx4_dev *dev, u8
port)<BR>+{<BR>+ struct mlx4_vlan_table *table =
&mlx4_priv(dev)->port[port].vlan_table;<BR>+ int
i;<BR>+<BR>+ sema_init(&table->vlan_sem, 1);<BR>+ for (i = 0; i
< MLX4_MAX_MAC_NUM; i++) {<BR>+ table->entries[i] =
0;<BR>+ table->refs[i] = 0;<BR>+ }<BR>+ table->max =
1 << dev->caps.log_num_vlans;<BR>+ table->total =
0;<BR>+}<BR>+<BR>+static int mlx4_SET_PORT_mac_table(struct mlx4_dev *dev, u8
port,<BR>+ __be64
*entries)<BR>+{<BR>+ struct mlx4_cmd_mailbox *mailbox;<BR>+ u32
in_mod;<BR>+ int err;<BR>+<BR>+ mailbox =
mlx4_alloc_cmd_mailbox(dev);<BR>+ if
(IS_ERR(mailbox))<BR>+ return
PTR_ERR(mailbox);<BR>+<BR>+ memcpy(mailbox->buf, entries,
MLX4_MAC_TABLE_SIZE);<BR>+<BR>+ in_mod = MLX4_SET_PORT_MAC_TABLE << 8
| port;<BR>+ err = mlx4_cmd(dev, mailbox->dma.da, in_mod, 1,
MLX4_CMD_SET_PORT,<BR>+
MLX4_CMD_TIME_CLASS_B);<BR>+<BR>+ mlx4_free_cmd_mailbox(dev,
mailbox);<BR>+ return err;<BR>+}<BR>+<BR>+int mlx4_register_mac(struct
mlx4_dev *dev, u8 port, u64 mac, int *index)<BR>+{<BR>+ struct
mlx4_mac_table *table =<BR>+ &mlx4_priv(dev)->port[port -
1].mac_table;<BR>+ int i, err = 0;<BR>+ int free = -1;<BR>+ u64
valid = 1;<BR>+<BR>+ mlx4_dbg(dev, "Registering mac : 0x%llx\n",
mac);<BR>+ down(&table->mac_sem);<BR>+ for (i = 0; i <
MLX4_MAX_MAC_NUM - 1; i++) {<BR>+ if (free < 0 &&
!table->refs[i]) {<BR>+ free =
i;<BR>+ continue;<BR>+ }<BR>+<BR>+ if
(mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))
{<BR>+ /* Mac already registered, increase refernce count
*/<BR>+ *index =
i;<BR>+ ++table->refs[i];<BR>+ goto
out;<BR>+ }<BR>+ }<BR>+ mlx4_dbg(dev, "Free mac index is
%d\n", free);<BR>+<BR>+ if (table->total == table->max)
{<BR>+ /* No free mac entries */<BR>+ err =
-ENOSPC;<BR>+ goto out;<BR>+ }<BR>+<BR>+ /* Register new
MAC */<BR>+ table->refs[free] = 1;<BR>+ table->entries[free] =
cpu_to_be64(mac | valid << MLX4_MAC_VALID_SHIFT);<BR>+<BR>+ err =
mlx4_SET_PORT_mac_table(dev, port, table->entries);<BR>+ if
(unlikely(err)) {<BR>+ mlx4_err(dev, "Failed adding mac: 0x%llx\n",
mac);<BR>+ table->refs[free] =
0;<BR>+ table->entries[free] = 0;<BR>+ goto
out;<BR>+ }<BR>+<BR>+ *index =
free;<BR>+ ++table->total;<BR>+out:<BR>+ up(&table->mac_sem);<BR>+ return
err;<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_register_mac);<BR>+<BR>+void
mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int
index)<BR>+{<BR>+ struct mlx4_mac_table *table
=<BR>+ &mlx4_priv(dev)->port[port -
1].mac_table;<BR>+<BR>+ down(&table->mac_sem);<BR>+ if
(!table->refs[index]) {<BR>+ mlx4_warn(dev, "No mac entry for
index %d\n", index);<BR>+ goto out;<BR>+ }<BR>+ if
(--table->refs[index]) {<BR>+ mlx4_warn(dev, "Have more references
for index %d,"<BR>+ "no need to modify mac table\n",
index);<BR>+ goto out;<BR>+ }<BR>+ table->entries[index]
= 0;<BR>+ mlx4_SET_PORT_mac_table(dev, port,
table->entries);<BR>+ --table->total;<BR>+out:<BR>+ up(&table->mac_sem);<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_unregister_mac);<BR>+<BR>+static
int mlx4_SET_PORT_vlan_table(struct mlx4_dev *dev, u8
port,<BR>+ __be32
*entries)<BR>+{<BR>+ struct mlx4_cmd_mailbox *mailbox;<BR>+ u32
in_mod;<BR>+ int err;<BR>+<BR>+ mailbox =
mlx4_alloc_cmd_mailbox(dev);<BR>+ if
(IS_ERR(mailbox))<BR>+ return
PTR_ERR(mailbox);<BR>+<BR>+ memcpy(mailbox->buf, entries,
MLX4_VLAN_TABLE_SIZE);<BR>+ in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 |
port;<BR>+ err = mlx4_cmd(dev, mailbox->dma.da, in_mod, 1,
MLX4_CMD_SET_PORT,<BR>+
MLX4_CMD_TIME_CLASS_B);<BR>+<BR>+ mlx4_free_cmd_mailbox(dev,
mailbox);<BR>+<BR>+ return err;<BR>+}<BR>+<BR>+int
mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int
*index)<BR>+{<BR>+ struct mlx4_vlan_table *table
=<BR>+ &mlx4_priv(dev)->port[port - 1].vlan_table;<BR>+ int i,
err = 0;<BR>+ int free =
-1;<BR>+<BR>+ down(&table->vlan_sem);<BR>+ for (i = 0; i <
MLX4_MAX_VLAN_NUM; i++) {<BR>+ if (free < 0 &&
(table->refs[i] == 0)) {<BR>+ free =
i;<BR>+ continue;<BR>+ }<BR>+<BR>+ if
(table->refs[i] &&<BR>+ (vlan ==
(MLX4_VLAN_MASK &<BR>+
be32_to_cpu(table->entries[i])))) {<BR>+ /* Vlan already
registered, increase refernce count */<BR>+ *index =
i;<BR>+ ++table->refs[i];<BR>+ goto
out;<BR>+ }<BR>+ }<BR>+<BR>+ if (table->total ==
table->max) {<BR>+ /* No free vlan entries */<BR>+ err
= -ENOSPC;<BR>+ goto out;<BR>+ }<BR>+<BR>+ /* Register new
MAC */<BR>+ table->refs[free] = 1;<BR>+ table->entries[free] =
cpu_to_be32(vlan | MLX4_VLAN_VALID);<BR>+<BR>+ err =
mlx4_SET_PORT_vlan_table(dev, port, table->entries);<BR>+ if
(unlikely(err)) {<BR>+ mlx4_warn(dev, "Failed adding vlan: %u\n",
vlan);<BR>+ table->refs[free] =
0;<BR>+ table->entries[free] = 0;<BR>+ goto
out;<BR>+ }<BR>+<BR>+ *index =
free;<BR>+ ++table->total;<BR>+out:<BR>+ up(&table->vlan_sem);<BR>+ return
err;<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_register_vlan);<BR>+<BR>+void
mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int
index)<BR>+{<BR>+ struct mlx4_vlan_table *table
=<BR>+ &mlx4_priv(dev)->port[port -
1].vlan_table;<BR>+<BR>+ down(&table->vlan_sem);<BR>+ if
(!table->refs[index]) {<BR>+ mlx4_warn(dev, "No vlan entry for
index %d\n", index);<BR>+ goto out;<BR>+ }<BR>+ if
(--table->refs[index]) {<BR>+ mlx4_dbg(dev, "Have more references
for index %d,"<BR>+ "no need to modify vlan table\n",
index);<BR>+ goto out;<BR>+ }<BR>+ table->entries[index]
= 0;<BR>+ mlx4_SET_PORT_vlan_table(dev, port,
table->entries);<BR>+ --table->total;<BR>+out:<BR>+ up(&table->vlan_sem);<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_unregister_vlan);<BR>+<BR>+int
mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, <BR>+ int reset_qkey_viols,
u32 cap_mask)<BR>+{<BR>+ struct mlx4_cmd_mailbox *mailbox;<BR>+ int
err;<BR>+ u8 is_eth = (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
? 1 : 0;<BR>+<BR>+ mailbox = mlx4_alloc_cmd_mailbox(dev);<BR>+ if
(IS_ERR(mailbox))<BR>+ return
PTR_ERR(mailbox);<BR>+<BR>+ memset(mailbox->buf, 0, 256);<BR>+ if
(dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {<BR>+ *(u8 *)
mailbox->buf = (u8)(!!reset_qkey_viols <<
6);<BR>+ ((__be32 *) mailbox->buf)[2] =
cpu_to_be32(cap_mask);<BR>+ } else {<BR>+ ((u8 *)
mailbox->buf)[3] =
(u8)!!reset_qkey_viols;<BR>+ ((__be32 *) mailbox->buf)[1] =
cpu_to_be32(cap_mask);<BR>+ }<BR>+ <BR>+ if (is_eth)
{<BR>+ ((u8 *) mailbox->buf)[3] = 7;<BR>+ ((__be16 *)
mailbox->buf)[3]
=<BR>+ cpu_to_be16(dev->caps.eth_mtu_cap[port]
+<BR>+ ETH_HLEN +
ETH_FCS_LEN);<BR>+ ((__be16 *) mailbox->buf)[4] = cpu_to_be16(1
<< 15);<BR>+ ((__be16 *) mailbox->buf)[6] = cpu_to_be16(1
<< 15);<BR>+ }<BR>+ err = mlx4_cmd(dev, mailbox->dma.da,
port, is_eth,
MLX4_CMD_SET_PORT,<BR>+
MLX4_CMD_TIME_CLASS_B);<BR>+<BR>+ mlx4_free_cmd_mailbox(dev,
mailbox);<BR>+ return err;<BR>+}<BR>+<BR>Index:
mlx4/kernel/bus/net/qp.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/qp.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/qp.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -142,20 +142,43
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> EXPORT_SYMBOL_GPL(mlx4_qp_modify);<BR> <BR>-int
mlx4_qp_alloc(struct mlx4_dev *dev, int sqpn, struct mlx4_qp *qp)<BR>+int
mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, u32
*base)<BR> {<BR> struct mlx4_priv *priv =
mlx4_priv(dev);<BR> struct mlx4_qp_table *qp_table =
&priv->qp_table;<BR>+ int qpn;<BR>+<BR>+ qpn =
mlx4_bitmap_alloc_range(&qp_table->bitmap, cnt, align);<BR>+ if (qpn
== -1)<BR>+ return -ENOMEM;<BR>+<BR>+ *base =
qpn;<BR>+ return
0;<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_qp_reserve_range);<BR>+<BR>+void
mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int
cnt)<BR>+{<BR>+ struct mlx4_priv *priv = mlx4_priv(dev);<BR>+ struct
mlx4_qp_table *qp_table = &priv->qp_table;<BR>+ if (base_qpn <
dev->caps.sqp_start +
8)<BR>+ return;<BR>+<BR>+ mlx4_bitmap_free_range(&qp_table->bitmap,
base_qpn, cnt);<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_qp_release_range);<BR>+<BR>+int
mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp
*qp)<BR>+{<BR>+ struct mlx4_priv *priv = mlx4_priv(dev);<BR>+ struct
mlx4_qp_table *qp_table = &priv->qp_table;<BR> int
err;<BR> <BR>- if (sqpn)<BR>- qp->qpn =
sqpn;<BR>- else {<BR>- qp->qpn =
mlx4_bitmap_alloc(&qp_table->bitmap);<BR>- if (qp->qpn ==
-1)<BR>- return -ENOMEM;<BR>- }<BR>+ if
(!qpn)<BR>+ return -EINVAL;<BR> <BR>+ qp->qpn =
qpn;<BR>+<BR> err = mlx4_table_get(dev, &qp_table->qp_table,
qp->qpn);<BR> if (err)<BR> goto err_out;<BR>@@
-203,9 +226,6 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> mlx4_table_put(dev, &qp_table->qp_table,
qp->qpn);<BR> <BR> err_out:<BR>- if
(!sqpn)<BR>- mlx4_bitmap_free(&qp_table->bitmap,
qp->qpn);<BR>-<BR> return
err;<BR> }<BR> EXPORT_SYMBOL_GPL(mlx4_qp_alloc);<BR>@@ -247,8 +267,6
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> mlx4_table_put(dev, &qp_table->auxc_table,
qp->qpn);<BR> mlx4_table_put(dev, &qp_table->qp_table,
qp->qpn);<BR> <BR>- if (qp->qpn >= dev->caps.sqp_start +
8)<BR>- mlx4_bitmap_free(&qp_table->bitmap,
qp->qpn);<BR> }<BR> EXPORT_SYMBOL_GPL(mlx4_qp_free);<BR> <BR>@@
-262,6 +280,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> {<BR> struct mlx4_qp_table *qp_table =
&mlx4_priv(dev)->qp_table;<BR> int err;<BR>+ int
reserved_from_top =
0;<BR> <BR> spin_lock_init(&qp_table->lock);<BR> INIT_RADIX_TREE(&dev->qp_table_tree,
GFP_ATOMIC);<BR>@@ -271,9 +290,44 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> * block
of special QPs must be aligned to a multiple of 8, so<BR> * round
up.<BR> */<BR>- dev->caps.sqp_start =
ALIGN(dev->caps.reserved_qps, 8);<BR>- err =
mlx4_bitmap_init(&qp_table->bitmap,
dev->caps.num_qps,<BR>-
(1 << 24) - 1, dev->caps.sqp_start +
8);<BR>+ dev->caps.sqp_start
=<BR>+ ALIGN(dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
8);<BR>+<BR>+ {<BR>+ int
sort[MLX4_QP_REGION_COUNT];<BR>+ int i, j, tmp;<BR>+ int
last_base = dev->caps.num_qps;<BR>+<BR>+ for (i = 1; i <
MLX4_QP_REGION_COUNT; ++i)<BR>+ sort[i] =
i;<BR>+<BR>+ for (i = MLX4_QP_REGION_COUNT; i > 0; --i)
{<BR>+ for (j = 2; j < i; ++j)
{<BR>+ if (dev->caps.reserved_qps_cnt[sort[j]]
><BR>+
dev->caps.reserved_qps_cnt[sort[j - 1]])
{<BR>+ tmp
=
sort[j];<BR>+ sort[j]
= sort[j - 1];<BR>+ sort[j - 1] =
tmp;<BR>+ }<BR>+ }<BR>+ }<BR>+<BR>+ for
(i = 1; i < MLX4_QP_REGION_COUNT; ++i) {<BR>+ last_base -=
dev->caps.reserved_qps_cnt[sort[i]];<BR>+ dev->caps.reserved_qps_base[sort[i]]
= last_base;<BR>+ reserved_from_top
+=<BR>+ dev->caps.reserved_qps_cnt[sort[i]];<BR>+ }<BR>+<BR>+ }<BR>+<BR>+ err
=
mlx4_bitmap_init_with_effective_max(&qp_table->bitmap,<BR>+
dev->caps.num_qps,<BR>+ (1 <<
23) - 1,<BR>+ dev->caps.sqp_start +
8,<BR>+ dev->caps.num_qps
-<BR>+ reserved_from_top);<BR>+<BR> if
(err)<BR> return err;<BR> <BR>@@ -287,6 +341,21
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> radix_tree_destroy(&dev->qp_table_tree);<BR> }<BR> <BR>+int
mlx4_qp_get_region(struct mlx4_dev
*dev,<BR>+ enum qp_region
region,<BR>+ int *base_qpn, int
*cnt)<BR>+{<BR>+ if ((region < 0) || (region >=
MLX4_QP_REGION_COUNT))<BR>+ return -EINVAL;<BR>+<BR>+ *base_qpn
= dev->caps.reserved_qps_base[region];<BR>+ *cnt =
dev->caps.reserved_qps_cnt[region];<BR>+<BR>+ return
0;<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_qp_get_region);<BR>+<BR>+<BR> int
mlx4_qp_query(struct mlx4_dev *dev, struct mlx4_qp
*qp,<BR> struct mlx4_qp_context
*context)<BR> {<BR>@@ -307,3 +376,35 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> EXPORT_SYMBOL_GPL(mlx4_qp_query);<BR> <BR>+int
mlx4_qp_to_ready(struct mlx4_dev *dev,<BR>+
struct mlx4_mtt *mtt,<BR>+ struct
mlx4_qp_context *context,<BR>+ struct
mlx4_qp *qp,<BR>+ enum mlx4_qp_state
*qp_state)<BR>+{<BR>+#define STATE_ARR_SIZE 4<BR>+ int err =
0;<BR>+ int i;<BR>+ enum mlx4_qp_state states[STATE_ARR_SIZE] =
{<BR>+ MLX4_QP_STATE_RST,<BR>+ MLX4_QP_STATE_INIT,<BR>+ MLX4_QP_STATE_RTR,<BR>+ MLX4_QP_STATE_RTS<BR>+ };<BR>+<BR>+ for
(i = 0; i < STATE_ARR_SIZE - 1; i++) {<BR>+ context->flags |=
cpu_to_be32(states[i+1] << 28);<BR>+ err = mlx4_qp_modify(dev,
mtt, states[i],<BR>+
states[i+1], context, 0, 0, qp);<BR>+ if (err)
{<BR>+ mlx4_err(dev, "Failed to bring qp to
state:"<BR>+ "%d with
error: %d\n",<BR>+ states[i+1],
err);<BR>+ return
err;<BR>+ }<BR>+ *qp_state =
states[i+1];<BR>+ }<BR>+ return
0;<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_qp_to_ready);<BR>+<BR>Index:
mlx4/kernel/bus/net/srq.c</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>===================================================================</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>---
mlx4/kernel/bus/net/srq.c (revision 1261)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>+++
mlx4/kernel/bus/net/srq.c (working copy)</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2>@@ -38,20 +38,20
@@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial size=2> struct
mlx4_srq_context
{<BR> __be32 state_logsize_srqn;<BR> u8 logstride;<BR>- u8 reserved1[3];<BR>- u8 pg_offset;<BR>- u8 reserved2[3];<BR>- u32 reserved3;<BR>+ u8 reserved1;<BR>+ __be16 xrc_domain;<BR>+ __be32 pg_offset_cqn;<BR>+ u32 reserved2;<BR> u8 log_page_size;<BR>- u8 reserved4[2];<BR>+ u8 reserved3[2];<BR> u8 mtt_base_addr_h;<BR> __be32 mtt_base_addr_l;<BR> __be32 pd;<BR> __be16 limit_watermark;<BR> __be16 wqe_cnt;<BR>- u16 reserved5;<BR>+ u16 reserved4;<BR> __be16 wqe_counter;<BR>- u32 reserved6;<BR>+ u32 reserved5;<BR> __be64 db_rec_addr;<BR> };<BR> <BR>@@
-107,14 +107,15 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2>
MLX4_CMD_TIME_CLASS_A);<BR> }<BR> <BR>-int mlx4_srq_alloc(struct
mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt,<BR>- u64
db_rec, struct mlx4_srq *srq)<BR>+int mlx4_srq_alloc(struct mlx4_dev *dev, u32
pdn, u32 cqn, u16 xrcd, <BR>+ struct mlx4_mtt *mtt, u64
db_rec, struct mlx4_srq *srq)<BR> {<BR> struct mlx4_srq_table
*srq_table = &mlx4_priv(dev)->srq_table;<BR> struct
mlx4_cmd_mailbox *mailbox;<BR> struct mlx4_srq_context
*srq_context;<BR> u64 mtt_addr;<BR> int
err;<BR>+ UNREFERENCED_PARAMETER(xrcd);<BR> <BR> srq->srqn
= mlx4_bitmap_alloc(&srq_table->bitmap);<BR> if (srq->srqn
== -1)<BR>@@ -146,6 +147,7 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> srq_context->state_logsize_srqn =
cpu_to_be32((ilog2(srq->max) << 24)
|<BR>
srq->srqn);<BR> srq_context->logstride
= (u8)(srq->wqe_shift - 4);<BR>+ srq_context->pg_offset_cqn =
cpu_to_be32(cqn &
0xffffff);<BR> srq_context->log_page_size
= (u8)(mtt->page_shift -
MLX4_ICM_PAGE_SHIFT);<BR> <BR> mtt_addr = mlx4_mtt_addr(dev,
mtt);<BR>@@ -182,19 +184,32 @@</FONT></SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=316075620-11062008><FONT face=Arial
size=2> }<BR> EXPORT_SYMBOL_GPL(mlx4_srq_alloc);<BR> <BR>-void
mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq)<BR>+<BR>+<BR>+void
mlx4_srq_invalidate(struct mlx4_dev *dev, struct mlx4_srq
*srq)<BR> {<BR>- struct mlx4_srq_table *srq_table =
&mlx4_priv(dev)->srq_table;<BR> int
err;<BR> <BR> err = mlx4_HW2SW_SRQ(dev, NULL,
srq->srqn);<BR> if (err)<BR> mlx4_warn(dev,
"HW2SW_SRQ failed (%d) for SRQN %06x\n", err,
srq->srqn);<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_srq_invalidate);<BR> <BR>+void
mlx4_srq_remove(struct mlx4_dev *dev, struct mlx4_srq
*srq)<BR>+{<BR>+ struct mlx4_srq_table *srq_table =
&mlx4_priv(dev)->srq_table;<BR>+<BR> spin_lock_irq(&srq_table->lock);<BR> radix_tree_delete(&srq_table->tree,
srq->srqn);<BR> spin_unlock_irq(&srq_table->lock);<BR>+}<BR>+EXPORT_SYMBOL_GPL(mlx4_srq_remove);<BR> <BR>+void
mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq)<BR>+{<BR>+ struct
mlx4_srq_table *srq_table =
&mlx4_priv(dev)->srq_table;<BR>+<BR> if
(atomic_dec_and_test(&srq->refcount))<BR> complete(&srq->free);<BR> wait_for_completion(&srq->free);</FONT></SPAN></DIV><div>
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