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<DIV><FONT face=Arial size=2><SPAN class=684274815-21072008>The following patch
changes the default behavior of mlx4 from tLast to tFirst.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=684274815-21072008></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=684274815-21072008>Assuming that
interrupt moderation is set to x us than:</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=684274815-21072008></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=684274815-21072008>tLast method means
that an interrupt is generated after x us that no packet arrives. (that is if
packets continue to arrive, no interrupt will be generated).</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=684274815-21072008>
<DIV><FONT face=Arial size=2><SPAN class=684274815-21072008>tFirst method means
that an interrupt is generated after x us from the first packet. (even if
packets continue to arrive).</SPAN></FONT></DIV></SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Index:
Q:/projinf4/trunk/hw/mlx4/kernel/bus/net/fw.c<BR>===================================================================<BR>---
Q:/projinf4/trunk/hw/mlx4/kernel/bus/net/fw.c (revision 2835)<BR>+++
Q:/projinf4/trunk/hw/mlx4/kernel/bus/net/fw.c (revision 2836)<BR>@@ -712,6
+712,12 @@<BR> #else<BR> #error Host endianness not
defined<BR> #endif<BR>+<BR>+ if (g.mod_interrupt_from_first)
{<BR>+ // Bit 30,31 tell the moderation method, 0 default, 1 from
first packet<BR>+ *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |=
cpu_to_be32(1 << 30);<BR>+ }<BR>+<BR> /* Check port for UD
address vector: */<BR> *(inbox + INIT_HCA_FLAGS_OFFSET / 4) |=
cpu_to_be32(1);<BR> <BR>Index:
Q:/projinf4/trunk/hw/mlx4/kernel/bus/net/mlx4.h<BR>===================================================================<BR>---
Q:/projinf4/trunk/hw/mlx4/kernel/bus/net/mlx4.h (revision 2835)<BR>+++
Q:/projinf4/trunk/hw/mlx4/kernel/bus/net/mlx4.h (revision 2836)<BR>@@ -88,6
+88,7 @@<BR> int mod_enable_qos;<BR> int
mod_mlx4_blck_lb;<BR> enum mlx4_port_type
mod_port_type[MLX4_MAX_PORTS];<BR>+ int
mod_interrupt_from_first;<BR> <BR> int
mod_msi_enable;<BR> int mod_msi_num_vector;<BR>Index:
Q:/projinf4/trunk/hw/mlx4/kernel/bus/drv/mlx4_bus.inf<BR>===================================================================<BR>---
Q:/projinf4/trunk/hw/mlx4/kernel/bus/drv/mlx4_bus.inf (revision
2835)<BR>+++
Q:/projinf4/trunk/hw/mlx4/kernel/bus/drv/mlx4_bus.inf (revision 2836)<BR>@@
-184,14 +184,15
@@<BR> HKR,"Parameters","LogNumMpt",%REG_DWORD%,0x00000012<BR> HKR,"Parameters","LogNumMtt",%REG_DWORD%,0x00000014<BR> HKR,"Parameters","EnableQoS",%REG_DWORD%,0x00000001<BR>+HKR,"Parameters","BlockMcastLoopBack",%REG_DWORD%,0x00000000<BR>+HKR,"Parameters","InterruptFromFirstPacket",%REG_DWORD%,0x00000001<BR>+<BR> HKR,"Parameters","NumMac",%REG_DWORD%,0x00000001<BR> HKR,"Parameters","NumVlan",%REG_DWORD%,0x00000000<BR> HKR,"Parameters","UsePrio",%REG_DWORD%,0x00000000<BR> HKR,"Parameters","PortType",%REG_SZ%,"ib,ib"<BR> <BR> <BR>-HKR,"Parameters","BlockMcastLoopBack",%REG_DWORD%,0x00000000<BR>-<BR> HKLM,"System\CurrentControlSet\Control\WMI\GlobalLogger\E51BB6E2-914A-4e21-93C0-192F4801BBFF","Flags",%REG_DWORD%,0xffff<BR> HKLM,"System\CurrentControlSet\Control\WMI\GlobalLogger\E51BB6E2-914A-4e21-93C0-192F4801BBFF","Level",%REG_DWORD%,0x3<BR> <BR>Index:
Q:/projinf4/trunk/hw/mlx4/kernel/bus/drv/drv.c<BR>===================================================================<BR>---
Q:/projinf4/trunk/hw/mlx4/kernel/bus/drv/drv.c (revision 2835)<BR>+++
Q:/projinf4/trunk/hw/mlx4/kernel/bus/drv/drv.c (revision 2836)<BR>@@ -894,9
+894,6 @@<BR> // "log maximum number of memory translation table
segments per HCA"<BR> DECLARE_CONST_UNICODE_STRING(numMtt,
L"LogNumMtt"); <BR> <BR>- // "Enable Quality of Service support
in the HCA if > 0, (default
1)"<BR>- DECLARE_CONST_UNICODE_STRING(enableQoS,
L"EnableQoS"); <BR>-<BR> // "Maximum number of MACs per ETH port
(1-127, default 1"<BR> DECLARE_CONST_UNICODE_STRING(numMac,
L"NumMac"); <BR> <BR>@@ -906,9 +903,15 @@<BR> // "Enable
steering by VLAN priority on ETH ports (0/1, default
0)"<BR> DECLARE_CONST_UNICODE_STRING(usePrio,
L"UsePrio"); <BR> <BR>+ // "Enable Quality of Service support in
the HCA if > 0, (default
1)"<BR>+ DECLARE_CONST_UNICODE_STRING(enableQoS,
L"EnableQoS"); <BR>+<BR> // "Block multicast loopback packets if
> 0 (default 1)"<BR> DECLARE_CONST_UNICODE_STRING(BlockMcastLB,
L"BlockMcastLoopBack"); <BR> <BR>+ // "Measure the interrupt from
the first packet (default
1)"<BR>+ DECLARE_CONST_UNICODE_STRING(InterruptFromFirstPacket,
L"InterruptFromFirstPacket"); <BR>+<BR> // "Ports L2 type
(ib/eth/auto, entry per port, comma seperated, default ib for
all)"<BR> DECLARE_CONST_UNICODE_STRING(PortType,
L"PortType");<BR> <BR>@@ -970,12 +973,6 @@<BR> if
(NT_SUCCESS (status)) <BR> g.mod_num_mtt =
value;<BR> <BR>- status = WdfRegistryQueryULong(hKey,
&enableQoS, &value);<BR>- if (NT_SUCCESS (status))
<BR>- g.mod_enable_qos =
value;<BR>- else<BR>- g.mod_enable_qos =
1;<BR>-<BR> status = WdfRegistryQueryULong(hKey, &numMac,
&value);<BR> if (NT_SUCCESS (status))
<BR> g.mod_num_mac = value;<BR>@@ -994,12 +991,26
@@<BR> else<BR> g.mod_use_prio =
0;<BR> <BR>+ status = WdfRegistryQueryULong(hKey,
&enableQoS, &value);<BR>+ if (NT_SUCCESS (status))
<BR>+ g.mod_enable_qos =
value;<BR>+ else<BR>+ g.mod_enable_qos =
1;<BR>+<BR>+<BR> status = WdfRegistryQueryULong(hKey,
&BlockMcastLB, &value);<BR> if (NT_SUCCESS (status))
<BR> g.mod_mlx4_blck_lb =
value;<BR> else<BR> g.mod_mlx4_blck_lb =
1;<BR> <BR>+ status = WdfRegistryQueryULong(hKey,
&InterruptFromFirstPacket, &value);<BR>+ if (NT_SUCCESS
(status)) <BR>+ g.mod_interrupt_from_first =
value;<BR>+ else<BR>+ g.mod_interrupt_from_first =
1;<BR>+<BR>+<BR> status = WdfRegistryQueryULong(hKey,
&MsiEnable, &value);<BR> if (NT_SUCCESS (status))
<BR> g.mod_msi_enable =
value;<BR></DIV></FONT></BODY></HTML>