[openib-general] [PATCH] mthca updates (2.6.8 dependent)
Michael S. Tsirkin
mst at mellanox.co.il
Tue Aug 17 10:26:23 PDT 2004
Hello!
Quoting r. Roland Dreier (roland at topspin.com) "Re: [openib-general] [PATCH] mthca updates (2.6.8 dependent)":
> Roland> Hmm... that seems like a really ugly "feature" to allow
> Roland> interrupts to pass posted writes within the chipset.
>
> Michael> No, I was talking about interrupt messages in PCI
> Michael> Express.
>
> I haven't looked at this in a while but I remember reading the PCI
> Express spec and deciding that interrupt messages sent after a posted
> write cannot pass the write within the PCI Express world. I thought
> the issue is that once the PCI Express root complex has received the
> interrupt message, it may process it and raise an interrupt with the
> CPU before earlier writes have made through to memory.
>
Yes, thats it. So PCI Express interrupts are similiar to PCI - ordering
versus writes may not be guaranteed. No idea if this happends in practice
though.
MST
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