[openib-general] [PATCH] mthca updates (2.6.8 dependent)

[Grant Grundler]

On Mon, Aug 30, 2004 at 09:12:36PM -0700, Roland Dreier wrote:
>     Grant> FYI, PARISC *only* support transaction based interrupts.
>     Grant> The CPU has no interrupt lines going to it.  On IA64, I
>     Grant> believe the same is true (for PCI) because the "Local
>     Grant> SAPIC" is integrated into the CPU (same silicon).
> 
> This must just be between the CPU and chipset... surely these
> platforms support conventional PCI devices.

Conventional PCI IRQs are converted to transaction based interrupts
on both PARISC and IA64 by the IO SAPIC (or some other agent on behalf
of the PCI device).

> (Even current Intel x86
> CPUs use interrupt messages rather than interrupt wires to get
> interrupts from their host bridges)

yes - I believe it's the same thing but requires IO xAPIC (IIRC).

grant