[openib-general] Re: [PATCH] roland-uverbs: possible race condition

[Michael S. Tsirkin]

Quoting r. Michael Krause <krause at cup.hp.com>:
>     In fact, section 6.1.3 of the PCIe spec says
>    
>         "Note that similarly to physical interrupt signals, the INTx emulation
>     mechanism may potentially cause spurious interrupts that must be handled by
>     the system software."
>    
>     which is conspicuously silent on ordering issues but seems to me to be
>     saying "watch out."
> 
> 
> It is silent because it is outside the scope of PCIe technology.  The
> informational note is there to act as a warning for those that may not be
> experienced in designing these types of solutions. 
> 
> Let's take a step back and focus on what people believe is a problem for OpenIB
> to solve here.  What do people believe is the root cause?
> 
> Mike
> 

Mike, what do you mean by the root cause?

If the CPU may start serving the interrupt
while DMA is not yet committed to memory, we may not rely on the
interrupt/DMA ordering, and its irrelevant whether its PCI-express
or chipset issue.

MST

-- 
MST - Michael S. Tsirkin