[openib-general] [PATCH] roland-uverbs: possible race condition

[Grant Grundler]

On Mon, Jan 31, 2005 at 02:40:18PM -0800, Michael Krause wrote:
> - INTx are treated as writes from a PCIe transaction perspective.

I remember the INTx are transactions once they hit the PCIe bus.
But do PCIe native devices emit those INTx transactions directly?

For some reaon I was thinking INTx was still a physical IRQ line for
legacy PCI compatibility.

...
> - In general, all interrupts (line or MSI/MSI-X) should be strongly ordered 
> relative to other write operations to avoid silent data corruption from 
> occurring.  As such, an interrupt should not pass a memory write when being 
> processed by the chipset.

Ok...I need to keep in mind your reply is for PCIe where "interrupts"
means "INTx transaction".

BTW, OS's using legacy PCI OS drivers already do protect themselves from
the DMA vs IRQ line delivery races. Or at least linux does.
MSI/MSI-X support was only introduce a year or so ago - 4 or 5 years after
MSI was introduced into PCI 2.2 spec.

> If you have any other questions, I'm happy to try and answer or one can 
> read the friendly specification for more specifics.

thanks for the corrections,
grant