[openib-general] basic IB doubt

[Jason Gunthorpe]

On Fri, Aug 25, 2006 at 09:33:31AM -0700, Roland Dreier wrote:
>     Thomas> How does an adapter guarantee that no bridges or other
>     Thomas> intervening devices reorder their writes, or for that
>     Thomas> matter flush them to memory at all!?
 
> That's a good point.  The HCA would have to do a read to flush the
> posted writes, and I'm sure it's not doing that (since it would add
> horrible latency for no good reason).

PCI (-X and -E) have strict transaction ordering rules, writes may not
be re-ordered, and two ordered writes to the same address have defined
semantics. One thing that is absolutely assured in a PCI system
is that if write B follows write A and the CPU observes B's data
then all of A must be visible to the CPU.

What I don't recall being assured is if all the data in a single
transaction has some defined order that it must be become visible to
the CPU..

This is why CQ's don't have a problem, seeing the new CQ entry, or the
MSI, is enough to ensure everything is visible to the CPU.

So, at the worst case, all a HCA would have to do is put the last
dword in a seperate transaction..

Jason