[openib-general] Race in mthca_cmd_post()

[chas williams - CONTRACTOR]

In message <adaac3y4z68.fsf at cisco.com>,Roland Dreier writes:
>How do you force out writes without doing a read?  I don't know of any
>other way to flush writes that is guaranteed by the PCI spec.

see Documentation/io_ordering.txt. 

>In any case that doesn't seem to be the problem here: the read is
>supposed to be done first, even in the source code.

i thought it might be because in a later message john said, 

>completing because the DDR memory is not yet available because SYS_EN never
>got down to the card before the readl, or did not complete before readl.

i would like to think that the altix isnt reordering read and writes
and that perhaps there needs to be a short delay between certain
writes.