[openib-general] Ordering between PCI config space writes and MMIO reads?
Roland Dreier
rdreier at cisco.com
Tue Oct 31 11:53:02 PST 2006
> Here's what I don't understand: according to PCI rules, pci config read
> can bypass pci config write (both are non-posted).
> So why does doing it help flush the writes as the comment claims?
No, I don't believe a read of a config register can pass a write of
the same register. (Someone correct me if I'm wrong)
- R.
More information about the general
mailing list