[openib-general] [PATCH 0 of 5] IB/mthca: memory registration fixes

[Michael S. Tsirkin]

This is a patch series with various fixes in mthca memory registration.
Please consider for 2.6.20. Patches 2 and 3 are what has been posted previously.

Patch list

1. mthca_0_fmr_page_fix.patch - fix off-by-one in FMR handling on memfree hardware
2. mthca_1_merge_mr_fmr_on_64bit.patch - merge MR and FMR on Tavor for 64 bit
					 not a fix properly, but a minor patch
3. mthca_2_fast_registration.patch - always write MTTs from CPU.
					 This is an enabler for 4, but also
					 gives a speed improvement for registration
4. mthca_3_alloc_consistent.patch - fix non-cache-coherent architectures
				    by adding dma_sync points and
				    allocating MPTs from cache coherent memory

5. mthca_4_dma_align_reserved_mtts.patch - finishes up 4 by making sure
				    reserved MTTs are in cache line of their own

-- 
MST