[ofa-general] Re: [PATCH 2 of 3] IB/mthca: support multiple completion vectors

Michael S. Tsirkin mst at dev.mellanox.co.il
Thu May 3 12:49:38 PDT 2007


> Quoting Roland Dreier <rdreier at cisco.com>:
> Subject: Re: [PATCH 2 of 3] IB/mthca: support multiple completion vectors
> 
>  > I don't know how many vectors make sense, so I decided to be
>  > conservative here, since each EQ consumes a lot of memory by default.
> 
> I think #vectors == O(#CPUs) is what we should aim for.
> 
> Also another useful thing for NUMA systems might be to allocate the EQ
> memory from the CPU where that interrupt will be targeted.

Can't interrupts migrate between CPUs?

> But I
> don't know exactly the best way to do that, and I think we can leave
> that for later.

OTOH, especially for latency, it might be best to only have 1 interrupt,
and service that on the node closest to device.

-- 
MST



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