[ofa-general][PATCH] mlx4: Completion EQ per cpu (MP support, Patch 10)

[Or Gerlitz]

Yevgeny Petrilin wrote:
> For example, distributing TCP flows among multiple cores is important for
> 10GE devices to sustain wire-speed with lots of connections.
In that respect (distributing TCP flows among cores), is there anything 
special here which is related to 10GbE but not to IPoIB?

>
> Each CQ is attached to an EQ and receives its completion interrupts from that EQ.
>
> CQ and EQ are not per port.
>
> Implementing this in in device layer allows all ULP's to use the feature.
> We do not expose EQ allocation API, because there is no point creating more EQs
> then CPUs.
CQ are not per port but netdevices are bounded to port (its correct that 
few of them can be bounded to the same port, eg with different PKEYs or 
VLAN tags), maybe it worth thinking on API that either let the ULP 
dictate to what CPU/core they want the EQ serving this CQ direct its 
interrupts or if the ULP doesn't care, let the driver allocate that in 
round robin fashion.

Shirley, assuming the ib core module would expose such binding API, 
what's your idea of using it in IPoIB?

Or.