[ofa-general][PATCH v2 1/2]mlx4: Multiple completion vectors support
Roland Dreier
rdreier at cisco.com
Wed Jun 18 10:48:01 PDT 2008
> > ?? Nothing ties the CQ event vector number to a CPU number that I know of.
> I am not sure to follow you. Do you want to say that the suggested
> implementation in this patch is such that the EQ is not tied to a
> specific CPU or that there is no proper mapping from the CPU this
> process is shielded on to the vector (=EQ) number this CQ would be
> associated with?
Well, both of your statements seem to be true: nothing sets the affinity
for the interrupts created for multiple EQs, and there is not any simply
way to guarantee that CQ vector 5 is sent to CPU 5 that I see.
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