[ofa-general] Re: [PATCH] ib_core: Use weak ordering for data registered memory

[Roland Dreier]

 > Some architectures support weak ordering in which case better
 > performance is possible. IB registered memory used for data can be
 > weakly ordered becuase the the completion queues' buffers are
 > registered as strongly ordered. This will result in flushing all data
 > related outstanding DMA requests by the HCA when a completion is DMAed
 > to a completion queue buffer.

This would break the Mellanox HW's guarantee of writing the last byte of
an RDMA last, right?  So on platforms where this has an effect (only
Cell at the moment) some applications could be subtly broken?

 - R.