[ofa-general] Memory registration limit of 16GB with Chelsio

[Steve Wise]

You could try something like this.  This removes the ISCSI and TOE/DDP 
memory usage, and bumps the PBL memory up to twice what it was.

(this is untested).

Steve.

----

--- drivers/net/cxgb3/t3_hw.c.org    2009-07-14 12:14:45.000000000 -0500
+++ drivers/net/cxgb3/t3_hw.c    2009-07-14 12:16:32.000000000 -0500
@@ -3084,13 +3084,13 @@ static void ulp_config(struct adapter *a
 {
     unsigned int m = p->chan_rx_size;
 
-    ulp_region(adap, ISCSI, m, p->chan_rx_size / 8);
-    ulp_region(adap, TDDP, m, p->chan_rx_size / 8);
+    ulp_region(adap, ISCSI, m, 0);
+    ulp_region(adap, TDDP, m, 0);
     ulptx_region(adap, TPT, m, p->chan_rx_size / 4);
     ulp_region(adap, STAG, m, p->chan_rx_size / 4);
     ulp_region(adap, RQ, m, p->chan_rx_size / 4);
-    ulptx_region(adap, PBL, m, p->chan_rx_size / 4);
-    ulp_region(adap, PBL, m, p->chan_rx_size / 4);
+    ulptx_region(adap, PBL, m, p->chan_rx_size / 2);
+    ulp_region(adap, PBL, m, p->chan_rx_size / 2);
     t3_write_reg(adap, A_ULPRX_TDDP_TAGMASK, 0xffffffff);
 }