[ofiwg] Register today! OFA 2025 Webinar Series: Webinar #4: From Slingshot to=?UTF-8?Q?=20Ultra=20Ethernet=20=E2=80?= =?UTF-8?Q?=93=20Building=20a=20Trans?=port Standard for Libfabric

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[OpenFabrics Alliance]

OFA 2025 Webinar Series
Join us for the next webinar in our multi-part series taking place Wednesday,
November 12, 2025, as we explore the Ultra Ethernet Transport (UET)—the first
network transport standard designed from the ground up to support the Libfabric
API at scale. 
This session will delve into the semantic and reliability layers of UET,
explaining how they are built to support Libfabric and the communication APIs
above it. You’ll also hear how UET draws inspiration from the Slingshot
Transport, evolving its ideas to serve both HPC and AI workloads. The talk will
conclude with a discussion on how the differing requirements between AI and HPC
allowed new optimizations and efficiencies in transport design.
REGISTER_NOWÂ 
 
OFA Webinar Series 2025 – Webinar #4
>From Slingshot to Ultra Ethernet: Building a Transport Standard for Libfabric 
Presented by: Keith Underwood, Senior Distinguished Technologist, HPE High
Performance Networking Business Unit 
November 12 | 8:00 AM – 9:00 AM PT / 11:00 AM – 12:00 PM ET

Keith Underwood - Senior Distinguished Technologist, HPE High Performance
Networking Business Unit
 
Keith Underwood is a Senior Distinguished Technologist in the HPE High
Performance Networking Business Unit, where he leads next-generation NIC
architecture definition. He serves as the editor of the UEC Transport Semantic
specification and is an active contributor to the UEC Transport definition.
Before joining Cray (now part of HPE), Keith was a founding member of the Omni-
Path team at Intel, where he led the Omni-Path 2 NIC architecture. He was part
of the team that created the Portals 4 API, which seeded the Libfabric
definition, and was a key contributor to developing the MPI-3 RMA extensions.

Keith brings decades of expertise in high-performance networking, helping shape
the standards and architectures that drive modern HPC and AI systems.
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