[openib-general] Re: mstflint failing on sparc64

[Grant Grundler]

On Sat, Jan 08, 2005 at 11:07:47PM +0200, Michael S. Tsirkin wrote:
> That may be the case, but on sparc64 it does not
> appear to be the case: 
> 
> /* On sparc64 we have the whole physical IO address space accessible
>  *  * using physically addressed loads and stores, so this does nothing.
>  *   */
> static inline void __iomem *ioremap(unsigned long offset, unsigned long
> size)
> {
>         return (void __iomem *)offset;
> }

No - this just means the address can be used as-is and the VM
will DTRT when presented this address.

Look at arch/sparc64/kernel/pci_psycho.c:psycho_base_address_update().
The last line of code in that routine forces the top half of a
64-bit BAR to zero.  The host address Tom dumped in the followup
to your email was > 32-bits:
1ff00000000-1ff7fffffff : PSYCHO0 PBMA
  1ff000a0000-1ff000bffff : Video RAM area
  1ff000c0000-1ff000c7fff : Video ROM
  1ff000f0000-1ff000fffff : System ROM
  1ff00100000-1ff001fffff : 0000:81:00.0
    1ff00180680-1ff0018070f : ib_mthca
    1ff001f00d8-1ff001f00df : ib_mthca
...

One this platform, the base offset for this PCI bus is 0x1ff in
the top 32-bits of the host address.

hth,
grant