[openib-general] Re: MMIO reads for IPoIB w/MSI-X

[Grant Grundler]

On Sun, Jan 23, 2005 at 11:06:34AM +0200, Michael S. Tsirkin wrote:
> But, do they hurt perf on ia64 more than on x86?

It does NOT depend on the CPU architecture.
It depends on how many bridge chips are between the CPU and IO device
and which type of bus the MMIO read has to flow through.

For ZX1 it's normally two (unless we add a PCI-PCI Bridge as well).
Most x86 chipsets only have one unless they use the north/south
bridge designs. IIRC, x86-64 with a single CPU also has one bridge.

For more discussion on HP ZX1 chips WRT MMIO reads, see:
	http://iou.parisc-linux.org/ols2002/

hth,
grant