[ewg] Re: [PATCH 2/14] nes: device structures and defines
    Jeff Garzik 
    jeff at garzik.org
       
    Wed Aug  8 09:19:09 PDT 2007
    
    
  
Andi Kleen wrote:
> Jeff Garzik <jeff at garzik.org> writes:
>>> +			val, reg_index, addr, addr+4); */
>>> +	writel(cpu_to_le32(reg_index), addr);
>>> +	writel(cpu_to_le32(val),(u8 *)addr + 4);
>> wrong -- endian conversion macros not needed with writel()
> 
> Are you sure?
Yes.
read[bwl] and write[bwl] are always defined in terms of the 
little-endian PCI bus.  This has been true since my first days in the 
kernel ages (decade+) ago, when we had a long discussion about it with 
regards to framebuffer drivers.
If you want to skip barriers and endian conversions, __raw_write[bwl]() 
exists.
The rare exceptions are a few embedded arches that implemented writel() 
for a non-PCI bus.  Those cases need to be renamed to mybus_writel(), 
but at least they do not interfere with mainstream drivers and APIs.
> I don't think that's true. e.g. powerpc writel 
> doesn't convert endian
Incorrect -- read the code.  PPC most certainly does convert endian.
Ten years ago Linus said something along the lines of "writel() means 
PCI means little endian.  period."  ;-)
	Jeff
    
    
More information about the ewg
mailing list