[openib-general] basic IB doubt

[Michael Krause]

At 12:53 PM 8/25/2006, Talpey, Thomas wrote:
>At 03:23 PM 8/25/2006, Greg Lindahl wrote:
> >On Fri, Aug 25, 2006 at 03:21:20PM -0400, mlakshmanan at silverstorm.com wrote:
> >
> >> I presume you meant invalidate the cache, not flush it, before
> >accessing DMA'ed
> >> data.
> >
> >Yes, this is what I meant. Sorry!
>
>Flush (sync for_device) before posting.
>Invalidate (sync for_cpu) before processing.
>
>On some architectures, these operations flush and/or invalidate
>i/o pipeline caches as well. As they should.

Many platforms have coherent I/O components so the explicit requirements on 
software to participate are often eliminated.

Mike 
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.openfabrics.org/pipermail/general/attachments/20060825/a24edfbe/attachment.html>