[openib-general] basic IB doubt

[Talpey, Thomas]

At 12:22 PM 8/28/2006, Jason Gunthorpe wrote:
>On Mon, Aug 28, 2006 at 10:38:43AM -0400, Talpey, Thomas wrote:
>
>> Will turning on the Opteron's IOMMU introduce some of these
>> issues to x86?
>
>No, definately not. The Opteron IOMMU (the GART) is a pure address
>translation mechanism and doesn't change the operation of the caches.

Okay, that's good. However, doesn't it delay reads and writes until the
necessary table walk / mapping is resolved? Because it passes all other
cycles through, it seems to me that an interrupt may pass data, meaning
that ordering (at least) may be somewhat different when it's present.
And, those pending writes are not in the cache's consistency domain
(i.e. they can't be snooped yet, right?).

>If Sun has a problem on larger systems I wonder if SGI Altix also has a
>problem? SGI Altix is definately a real system that people use IB
>cards in today and it would be easy to imagine such a large system
>could have coherence issues with memory polling..

I'd be interested in this too.

Tom.