[nvmewin] ***UNCHECKED*** final bits for inspection

Luse, Paul E paul.e.luse at intel.com
Tue Apr 3 11:51:52 PDT 2012

Here's what we just looked at + 2 changes:

-         Removed spinlock in DPC/ISR for learning

-         Added check for INT_TYPE_MSI to determine whether we can learn or not

Rebuilt for both qemu and chatham and did some quick smoke tests.

Pw is ofanvme123

Let me know if additional changes are needed or if everyone is good to go.  Anyone, of course, can ask additional questions/request other changes however once we heard the word from IDT+LSI we'll merge.


Paul Luse
Sr. Staff Engineer
PCG Server Software Engineering
Desk: 480.554.3688, Mobile: 480.334.4630

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