[nvmewin] patch review request

Luse, Paul E paul.e.luse at intel.com
Fri Jan 20 13:03:35 PST 2012


So attached isn't a patch, it's the changed files as we don't have the patch process down yet (compare to the only version in SVN at the moment).  Below are the changes (pretty small) and notes for SVN and the release notes.  Tested on both Chatham and QEMU w/data integrity test as well as stress and SCSI compliance tests.

nvmeStd.c (for svn log:  assert changes & changes to support APIC logical mode)
line 1236:  changes in debug code to avoid asserts that we don't care about; also made this condition on chatham so qemu isn't so annoying

NVMeIsrMsix():  changes to correctly support 'logical mode'.  When we examine the MSI address as part of init, we determine if we know the physical mapping of cores/vectors or not and if we don't we go to a 'shared mode'.  The 'shared mode' wasn't working correctly (never tested) as it was missing some code.  I was able to exercise this mode by using Server 8.  I believe when we can have a better solution when in 'logical mode', instead of going into shared mode I believe we do a bit moe work up front to figure out the mappings but will leave that for another day....

Line 2803:  Chatham only change

Nvmepowermgmt.c (for svn log:  chatham specific changes)
Line 97:  chatham only change

NVMeAdapterControlPowerDown90:  chatham only changes

Nvmeinit.c for svn log:  assert changes
NVMeNormalShutdown():  a few chatham only changes

Sources (for svn log:  added qemu compile switch)
-added qemu compile switch

For release notes:

-         Misc changes for Chatham and changes to the ISR to support APIC logical mode.

____________________________________
Paul Luse
Sr. Staff Engineer
PCG Server Software Engineering
Desk: 480.554.3688, Mobile: 480.334.4630

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