[ofiwg] packet ordering considerations.

Tue Jun 24 10:08:05 PDT 2014

Are there any PCI experts or memory controller experts in the working
group?  As an MPI engineer, I don't know enough about ordering
considerations at the lower physical layer to comment intelligently about
this topic.  As things become more asyncronus, we don't want to be fighting
the memory controllers, or the busses on ordering issues.

Regards,

Geoffrey (Geoff) Paulsen
Software Engineer - Platform MPI

 Phone: 1-720-349-2832                                                              IBM 
 E-mail: gpaulsen at us.ibm.com                                                            
                                                                    1177 S Belt Line Rd 
                                                                 Coppell, TX 75019-4642 
                                                                          United States 

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