[ofiwg] OFIWG Meeting 1/27/2026 Minutes

[Xiong, Jianxin]

1/27/2026

** Participants **

    Alex McKinley (Intel)
    Alexia Ingerson (Intel)
    Archana
    Bob Cernohous (Cornelis Networks)
    Howard Pritchard (LANL)
    James Swaro[HPE]
    Jerome Soumagne (HPE)
    Jessie (AWS)
    Jianxin Xiong (Intel)
    Kaike Wan (Intel)  
    Ken Raffenetti (ANL) 
    Shi Jin (AWS)
    Stephen Oost (Intel)
    Zach Dworkin (Intel)
    Rajalaxmi (Intel)

** Notes **

   Jessie presented a proposal for exposing maximum counter values.
    * Currently counters have type unit64_t
    * The full range is not always supported due to hardware limitations or software constraints
    * Providers already use different ranges: cxi -- 48 bits, sockets -- 32 bits, efa -- 31 bits (hw)
    * Currently this information is not exposed via the API, application has to hard code for providers in order to counter overflow
    * The proposal is to add 'max_cntr_vale' field to `fi_domain_attr` to expose the info via `fi_getinfo`
    * Targeting v2.5.0
    * The benefit is to eliminate hardcoded provider specific handling of counter wraparounds

    Jerome suggested to have separate limits for completion counters and error counters. For example, cxi uses 8 bits for error counter.

    Jessie will prepare a PR for review.

    Shi mentioned that the other part of the original planned proposal (allowing external memory for counters) needs more deliberation and will be discussed separately in the future.

Jianxin Xiong
Fabric Software
Intel Corporation
Jianxin.xiong at intel.com